Evolvable hardware design based on a novel simulated annealing in an embedded system

2010 ◽  
Vol 24 (4) ◽  
pp. 354-370 ◽  
Author(s):  
Guoliang He ◽  
Naixue Xiong ◽  
Laurence T. Yang ◽  
Tai-hoon Kim ◽  
Ching Hsien Hsu ◽  
...  
2011 ◽  
Vol 219-220 ◽  
pp. 629-632
Author(s):  
Zai Ping Chen ◽  
Feng Wang ◽  
Chao Jia

As a typical application layer protocol of CAN-bus, CANopen has been widely accepted in many fields. In this paper, CanFestival, which is a kind of open-source CANopen stack, is briefly introduced. The implementation scheme of CANopen slave node is proposed, which is based on a kind of AVR microcontroller-AT90CAN128 and open-source CANopen stack-CanFestival. In this paper the hardware design of slave node and the open-source protocol stack transplant have completed successfully. The debugging experiment of this slave node communication has been carried out, and the correctness of the scheme of hardware design and software transplant is verified by debugging experiment results in this paper.


2014 ◽  
Vol 596 ◽  
pp. 883-887
Author(s):  
Xin Li Li

S3C4510B is a cost-effective 16/32 bit RISC microcontroller based on Ethernet application system, and ISP1161 is a chip which is designed to implement USB protocol in an embedded system. Here, we design and implement embedded systems USB with ISP1161 chip based on ARM microprocessor S3C4510B. This paper describes the basic working principle of ISP1161 chip and hardware design of the system, and presents the software implementation process of USB in embedded systems.


2013 ◽  
Vol 333-335 ◽  
pp. 2412-2416
Author(s):  
Jin Feng Yan ◽  
Ming Deng ◽  
Yan Jun Li ◽  
Qi Sheng Zhang

SoPC technology is a high-performance, low-power consumption embedded system solution based on embedded microprocessor, providing a new way for developing new type centralized engineering seismograph. The paper presents the development of a new type centralized engineering seismograph based on SoPC technology, which adopts FPGA design based on SoPC technology for the hardware design and embedded software program development of the 48-channel engineering seismograph. According to actual needs of currently available centralized engineering seismograph, combining the actual characteristics of SoPC embedded technology, a portable, low-power consumption and high-performance new type centralized engineering seismograph is constructed. The paper describes the hardware design and software program implementation of the centralized engineering seismograph in detail.


2013 ◽  
Vol 2013 ◽  
pp. 1-8 ◽  
Author(s):  
Xibin Zhao ◽  
Hehua Zhang ◽  
Yu Jiang ◽  
Songzheng Song ◽  
Xun Jiao ◽  
...  

As being one of the most crucial steps in the design of embedded systems, hardware/software partitioning has received more concern than ever. The performance of a system design will strongly depend on the efficiency of the partitioning. In this paper, we construct a communication graph for embedded system and describe the delay-related constraints and the cost-related objective based on the graph structure. Then, we propose a heuristic based on genetic algorithm and simulated annealing to solve the problem near optimally. We note that the genetic algorithm has a strong global search capability, while the simulated annealing algorithm will fail in a local optimal solution easily. Hence, we can incorporate simulated annealing algorithm in genetic algorithm. The combined algorithm will provide more accurate near-optimal solution with faster speed. Experiment results show that the proposed algorithm produce more accurate partitions than the original genetic algorithm.


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