Trap-Assisted Tunneling in MIS and Schottky Structures

1983 ◽  
Vol 79 (1) ◽  
pp. 223-236 ◽  
Author(s):  
F. Campabadal ◽  
V. Milian ◽  
X. Aymerich-Humet
2011 ◽  
Vol 20 (03) ◽  
pp. 557-564
Author(s):  
G. R. SAVICH ◽  
J. R. PEDRAZZANI ◽  
S. MAIMON ◽  
G. W. WICKS

Tunneling currents and surface leakage currents are both contributors to the overall dark current which limits many semiconductor devices. Surface leakage current is generally controlled by applying a post-epitaxial passivation layer; however, surface passivation is often expensive and ineffective. Band-to-band and trap assisted tunneling currents cannot be controlled through surface passivants, thus an alternative means of control is necessary. Unipolar barriers, when appropriately applied to standard electronic device structures, can reduce the effects of both surface leakage and tunneling currents more easily and cost effectively than other methods, including surface passivation. Unipolar barriers are applied to the p -type region of a conventional, MBE grown, InAs based pn junction structures resulting in a reduction of surface leakage current. Placing the unipolar barrier in the n -type region of the device, has the added benefit of reducing trap assisted tunneling current as well as surface leakage currents. Conventional, InAs pn junctions are shown to exhibit surface leakage current while unipolar barrier photodiodes show no detectable surface currents.


AIP Advances ◽  
2017 ◽  
Vol 7 (6) ◽  
pp. 065016 ◽  
Author(s):  
Z. G. Shao ◽  
Q. J. Gu ◽  
X. F. Yang ◽  
J. Zhang ◽  
Y. W. Kuang ◽  
...  

2020 ◽  
Vol 1004 ◽  
pp. 652-658
Author(s):  
Judith Berens ◽  
Gregor Pobegen ◽  
Tibor Grasser

The interface between the gate oxide and silicon carbide (SiC) has a strong influence on the performance and reliability of SiC MOSFETs and thus, requires special attention. In order to reduce charge trapping at the interface, post oxidation anneals (POAs) are conventionally applied. However, these anneals do not only influence the device performance, such as mobility and on-resistance, but also the gate oxide reliability. We study the oxide tunneling mechanisms of NH3 annealed 4H-SiC trench MOSFET test structures and compare them to devices which received a NO POA. We show that 3 different mechanisms, namely trap assisted tunneling (TAT), Fowler-Nordheim (FN) tunneling and charge trapping are found for NH3 annealed MOS structures whereas only FN-tunneling is observed in NO annealed devices.The tunneling barrier suggest a trap level with an effective activation energy of 382 meV to enable TAT.


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