2.1: Invited Paper: 16.9‐Inch Flexible AMOLED Display with High Performance Top Gate Oxide TFT

2021 ◽  
Vol 52 (S2) ◽  
pp. 48-50
Author(s):  
YuanJun Hsu ◽  
Zhenguo Lin ◽  
Yihong Lu ◽  
BaiXiang Han ◽  
Weiran Cao ◽  
...  
Keyword(s):  
High Performance ◽  
Gate Oxide ◽  
Oxide Tft

4‐2: Invited Paper: High Performance Top Gate Oxide TFT Technology for Large Area Flexible AMOLED Display

2021 ◽  
Vol 52 (1) ◽  
pp. 21-24
Author(s):  
Weiran Cao ◽  
Yuan-Jun Hsu ◽  
Zheng Jiang ◽  
Fangmei Liu ◽  
Yuan-Chun Wu ◽  
...  
Keyword(s):  
High Performance ◽  
Gate Oxide ◽  
Large Area ◽  
Oxide Tft

Development of high k/III-V (InGaAs, InAs, InSb) structures for future low power, high speed device applications

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin
Keyword(s):  
Low Power ◽  
Leakage Current ◽  
High Speed ◽  
High Performance ◽  
Gate Oxide ◽  
Chemical Cleaning ◽  
Low Leakage ◽  
Low Leakage Current ◽  
High K ◽  
Cleaning Methods

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.

scholarly journals Performance Measures of Different Gate Oxide Materials in Gate All Around Fet

2020 ◽  
Vol 9 (2) ◽  
pp. 23-25
Keyword(s):  
High Performance ◽  
Field Effect Transistors ◽  
Gate Oxide ◽  
Oxide Semiconductor ◽  
Oxide Materials ◽  
Performance Limits ◽  
Short Channel ◽  
Advanced Technique ◽  
And Performance

The classical planar Metal Oxide Semiconductor Field Effect Transistors (MOSFET) is fabricated by oxidation of a semiconductor namely Silicon. In this generation, an advanced technique called 3D system architecture FETs, are introduced for high performance and low power quality of devices. Based on the limitations of Short Channel Effect (SCE), Silicon (Si) FET cannot be scaled under 10nm. Hence various performing measures like methods, principles, and geometrics are done to upscale the semiconductor. CMOS using alternate channel materials like GE and III-Vs on substrates is a highly anticipated technique for developing nanowire structures. By considering these issues, in this paper, we developed a simulation model that provides accurate results basing on Gate layout and multi-gate NW FET's so that the scaling can be increased few nanometers long and performance limits gradually increases. The model developed is SILVACO that tests the action of FET with different gate oxide materials.

Novel self-aligned top-gate oxide TFT for AMOLED displays

2012 ◽  
Vol 20 (1) ◽  
pp. 47 ◽  
Author(s):  
Narihiro Morosawa ◽  
Yoshihiro Ohshima ◽  
Mitsuo Morooka ◽  
Toshiaki Arai ◽  
Tatsuya Sasaoka
Keyword(s):  
Gate Oxide ◽  
Oxide Tft

High Performance Polysilicon Thin-Film Transistors Using Very Thin Sputtered Gate Oxide Films

1993 ◽  
Author(s):  
Noriyoshi Yamauchi ◽  
Nobuhiko Kakuda ◽  
Tomoko Hisaki
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
High Performance ◽  
Oxide Films ◽  
Gate Oxide

Dual Gate Oxide Process Integration for High Performance Embedded Memory Products

1998 ◽  
Author(s):  
Hideo Oi ◽  
Yasuhito Shiho ◽  
Peter Chen ◽  
Navakant Bhat
Keyword(s):  
High Performance ◽  
Process Integration ◽  
Gate Oxide ◽  
Embedded Memory ◽  
Dual Gate

35.3: Distinguished Paper: A Novel Self-Aligned Top-Gate Oxide TFT for AM-OLED Displays

2011 ◽  
Vol 42 (1) ◽  
pp. 479-482 ◽  
Author(s):  
Narihiro Morosawa ◽  
Yoshihiro Ohshima ◽  
Mitsuo Morooka ◽  
Toshiaki Arai ◽  
Tatsuya Sasaoka
Keyword(s):  
Gate Oxide ◽  
Oxide Tft
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