4‐2: Invited Paper: High Performance Top Gate Oxide TFT Technology for Large Area Flexible AMOLED Display

2021 ◽  
Vol 52 (1) ◽  
pp. 21-24
Author(s):  
Weiran Cao ◽  
Yuan-Jun Hsu ◽  
Zheng Jiang ◽  
Fangmei Liu ◽  
Yuan-Chun Wu ◽  
...  

2021 ◽  
Vol 52 (S2) ◽  
pp. 48-50
Author(s):  
YuanJun Hsu ◽  
Zhenguo Lin ◽  
Yihong Lu ◽  
BaiXiang Han ◽  
Weiran Cao ◽  
...  


Author(s):  
Mahesh Soni ◽  
Dhayalan Shakthivel ◽  
Adamos Christou ◽  
Ayoub Zumeit ◽  
Nivasan Yogeswaran ◽  
...  


Sensors ◽  
2021 ◽  
Vol 21 (6) ◽  
pp. 2163
Author(s):  
Dongjin Kim ◽  
Seungyong Han ◽  
Taewi Kim ◽  
Changhwan Kim ◽  
Doohoe Lee ◽  
...  

As the safety of a human body is the main priority while interacting with robots, the field of tactile sensors has expanded for acquiring tactile information and ensuring safe human–robot interaction (HRI). Existing lightweight and thin tactile sensors exhibit high performance in detecting their surroundings. However, unexpected collisions caused by malfunctions or sudden external collisions can still cause injuries to rigid robots with thin tactile sensors. In this study, we present a sensitive balloon sensor for contact sensing and alleviating physical collisions over a large area of rigid robots. The balloon sensor is a pressure sensor composed of an inflatable body of low-density polyethylene (LDPE), and a highly sensitive and flexible strain sensor laminated onto it. The mechanical crack-based strain sensor with high sensitivity enables the detection of extremely small changes in the strain of the balloon. Adjusting the geometric parameters of the balloon allows for a large and easily customizable sensing area. The weight of the balloon sensor was approximately 2 g. The sensor is employed with a servo motor and detects a finger or a sheet of rolled paper gently touching it, without being damaged.



2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Muhammad Naqi ◽  
Kyung Hwan Choi ◽  
Hocheon Yoo ◽  
Sudong Chae ◽  
Bum Jun Kim ◽  
...  

AbstractLow-temperature-processed semiconductors are an emerging need for next-generation scalable electronics, and these semiconductors need to feature large-area fabrication, solution processability, high electrical performance, and wide spectral optical absorption properties. Although various strategies of low-temperature-processed n-type semiconductors have been achieved, the development of high-performance p-type semiconductors at low temperature is still limited. Here, we report a unique low-temperature-processed method to synthesize tellurium nanowire networks (Te-nanonets) over a scalable area for the fabrication of high-performance large-area p-type field-effect transistors (FETs) with uniform and stable electrical and optical properties. Maximum mobility of 4.7 cm2/Vs, an on/off current ratio of 1 × 104, and a maximum transconductance of 2.18 µS are achieved. To further demonstrate the applicability of the proposed semiconductor, the electrical performance of a Te-nanonet-based transistor array of 42 devices is also measured, revealing stable and uniform results. Finally, to broaden the applicability of p-type Te-nanonet-based FETs, optical measurements are demonstrated over a wide spectral range, revealing an exceptionally uniform optical performance.





2021 ◽  
Vol 17 ◽  
pp. 100352
Author(s):  
S.-J. Wang ◽  
M. Sawatzki ◽  
H. Kleemann ◽  
I. Lashkov ◽  
D. Wolf ◽  
...  


2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.



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