On complex multiplications

2002 ◽  
pp. 52-59
Author(s):  
Goro Shimura
Keyword(s):  
Complex Multiplications

scholarly journals Working Memory, Strategy Execution, and Strategy Selection in Mental Arithmetic

2007 ◽  
Vol 60 (9) ◽  
pp. 1246-1264 ◽  
Author(s):  
Ineke Imbo ◽  
Sandrine Duverne ◽  
Patrick Lemaire
Keyword(s):  
Working Memory ◽  
Memory Load ◽  
Mental Arithmetic ◽  
Load Condition ◽  
Strategy Selection ◽  
Strategy Execution ◽  
Working Memory Load ◽  
Simple Strategy ◽  
Complex Multiplications ◽  
The Impact

A total of 72 participants estimated products of complex multiplications of two-digit operands (e.g., 63 × 78), using two strategies that differed in complexity. The simple strategy involved rounding both operands down to the closest decades (e.g., 60 × 70), whereas the complex strategy required rounding both operands up to the closest decades (e.g., 70 × 80). Participants accomplished this estimation task in two conditions: a no-load condition and a working-memory load condition in which executive components of working memory were taxed. The choice/no-choice method was used to obtain unbiased strategy execution and strategy selection data. Results showed that loading working-memory resources led participants to poorer strategy execution. Additionally, participants selected the simple strategy more often under working-memory load. We discuss the implications of the results to further our understanding of variations in strategy selection and execution, as well as our understanding of the impact of working-memory load on arithmetic performance and other cognitive domains.

Beamforming with Kerdock Codes in LTE System for High-Speed Railway

2014 ◽  
Vol 989-994 ◽  
pp. 3556-3560
Author(s):  
Zhi Hua Yang ◽  
Lei Jun Wang ◽  
Ze Kai Fang
Keyword(s):  
Bit Error Rate ◽  
Communication System ◽  
System Performance ◽  
High Speed ◽  
High Speed Railway ◽  
Kerdock Codes ◽  
Simulation Results ◽  
Complex Multiplications ◽  
Beamforming Technique ◽  
Ber Performance

Beamforming technique based the reciprocity of LTE communication system for high-speed railway is a practical way to improve the system performance in this paper. Kerdock codes, which facilitate efficient codebook and codeword search, are implemented in the LTE system for high-speed railway as the beamforming precoding codebook. The analysis of complexity and simulation results about the communication system of the beamforming with Kerdock codes (KBF) show that the proposed KBF can eliminate complex multiplications and improve the Bit Error Rate (BER) performance at large SNR compared with the existing beamfoming communication system for high-speed railway.

scholarly journals A CUDA fast multipole method with highly efficient M2L far field evaluation

2020 ◽  
Vol 35 (1) ◽  
pp. 97-117 ◽  
Author(s):  
Bartosz Kohnke ◽  
Carsten Kutzner ◽  
Andreas Beckmann ◽  
Gert Lube ◽  
Ivo Kabadshow ◽  
...  
Keyword(s):  
Graphics Processing Units ◽  
Fast Multipole Method ◽  
Field Evaluation ◽  
High Approximation ◽  
Fast Multipole ◽  
N Body Problem ◽  
Multipole Method ◽  
Memory Accesses ◽  
Complex Multiplications ◽  
Computational Bottleneck

Solving an N-body problem, electrostatic or gravitational, is a crucial task and the main computational bottleneck in many scientific applications. Its direct solution is an ubiquitous showcase example for the compute power of graphics processing units (GPUs). However, the naïve pairwise summation has [Formula: see text] computational complexity. The fast multipole method (FMM) can reduce runtime and complexity to [Formula: see text] for any specified precision. Here, we present a CUDA-accelerated, C++ FMM implementation for multi particle systems with [Formula: see text] potential that are found, e.g. in biomolecular simulations. The algorithm involves several operators to exchange information in an octree data structure. We focus on the Multipole-to-Local (M2L) operator, as its runtime is limiting for the overall performance. We propose, implement and benchmark three different M2L parallelization approaches. Approach (1) utilizes Unified Memory to minimize programming and porting efforts. It achieves decent speedups for only little implementation work. Approach (2) employs CUDA Dynamic Parallelism to significantly improve performance for high approximation accuracies. The presorted list-based approach (3) fits periodic boundary conditions particularly well. It exploits FMM operator symmetries to minimize both memory access and the number of complex multiplications. The result is a compute-bound implementation, i.e. performance is limited by arithmetic operations rather than by memory accesses. The complete CUDA parallelized FMM is incorporated within the GROMACS molecular dynamics package as an alternative Coulomb solver.

scholarly journals Pipelined vedic multiplier with manifold adder complexity levels

2020 ◽  
Vol 10 (3) ◽  
pp. 2951
Author(s):  
Ansiya Eshack ◽  
S. Krishnakumar
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Throughput ◽  
Low Power Consumption ◽  
Portable Devices ◽  
Vedic Mathematics ◽  
Vedic Multiplier ◽  
Design Systems ◽  
Complex Multiplications ◽  
Research World

Recently, the increased use of portable devices, has driven the research world to design systems with low power-consumption and high throughput. Vedic multiplier provides least delay even in complex multiplications when compared to other conventional multipliers. In this paper, a 64-bit multiplier is created using the Urdhava Tiryakbhyam sutra in Vedic mathematics. The design of this 64-bit multiplier is implemented in five different ways with the pipelining concept applied at different stages of adder complexities. The different architectures show different delay and power consumption. It is noticed that as complexity of adders in the multipliers reduce, the systems show improved speed and least hardware utilization. The architecture designed using 2 x 2 – bit pipelined Vedic multiplier is, then, compared with existing Vedic multipliers and conventional multipliers and shows least delay.

scholarly journals Double Precision Floating Point Fft Processor using Vedic Mathematics

2019 ◽  
Vol 8 (4) ◽  
pp. 8533-8538
Keyword(s):  
Fourier Transform ◽  
Fast Fourier Transform ◽  
Floating Point ◽  
Double Precision ◽  
Power Efficient ◽  
Vedic Mathematics ◽  
Communication Signal ◽  
Fft Processor ◽  
Complex Multiplications ◽  
Point Fast Fourier Transform

There should be rapid, efficient and simple process for every scenario now a day. To compute the N point DFT, Fast Fourier Transform (FFT) is a productive algorithm. It has great applications in communication, signal and image processing and instrumentation. In the implementation of FFT one of the challenges is the complex multiplications, so to make this process rapid and simple it’s necessary for a multiplier to be fast and power efficient. To tackle this problem Karatsuba sutra and Nikhilam sutra are an efficient method of multiplication in Vedic Mathematics. This paper will present a design methodology of Double Precision Floating Point Fast Fourier Transform (FFT) Processor.The execution time and complexity can be reduced by the algorithm which is there in Vedic.The main aim is to make FFT Processor process rapid and simple by designing a multiplier which is fast and power efficient by using double precision floating point and Vedic Mathematics concepts.

Arithmetic on curves with complex multiplication by the Eisenstein integers

1969 ◽  
Vol 65 (1) ◽  
pp. 59-73 ◽  
Author(s):  
A. R. Rajwade
Keyword(s):  
Elliptic Curves ◽  
Complex Multiplication ◽  
Complex Multiplications

This paper is a contribution to the verification of conjectures of Birch and Swinnerton-Dyer about elliptic curves (1). The evidence that they produce is largely derived from curves with complex multiplication by i. In a previous paper (8), we had considered curves with complex multiplication by √ − 2. Here we shall look at the case when the ring of complex multiplications is isomorphic to the ring Z[ω], where ω3 = 1, ω ≠ 1.

scholarly journals An analogue of a conjecture of Sato and Tate for a Hilbert modular form

1975 ◽  
Vol 16 (2) ◽  
pp. 69-87 ◽  
Author(s):  
H. L. Resnikoff ◽  
R. L. Saldaña
Keyword(s):  
Modular Form ◽  
Elliptic Curve ◽  
Density Function ◽  
Number Field ◽  
Hilbert Modular Form ◽  
Hilbert Modular ◽  
Complex Multiplications ◽  
Image Position

If k denotes a number field and εm is the product of an elliptic curve ε with itself m times over k, then for each prime π where ε has non-degenerate reduction, the zeta factor ζ(επ'S) can be expressed asWhere |π| denotes the norm of π. It is a consequence of a conjecture of Tate [16] that if ε does not have complex multiplications, then the numbers are distributed according to the density functionthat is, the density of the set of primes π such that – is

Arithmetic on curves with complex multiplication by √ − 2

1968 ◽  
Vol 64 (3) ◽  
pp. 659-672 ◽  
Author(s):  
A. R. Rajwade
Keyword(s):  
Elliptic Curves ◽  
Complex Multiplication ◽  
Complex Multiplications

This paper is a contribution to the verification of conjectures of Birch and Swinnerton-Dyer about elliptic curves (1). The evidence that they produce is largely derived from curves with complex multiplication by i. It is natural to consider other kinds of complex multiplications and here we shall make a start on the case when the ring of complex multiplications is isomorphic to the ring Z[σ], where σ2 = − 2.

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