Electrical Testing of Bare Fine Pitch Printed Circuit Boards

Author(s):  
James Grasso
Author(s):  
Oleg Yu. Sisoev ◽  
Sergey S. Sokolov ◽  
Victor A. Tupik

The analysis of autorouter efficiency in the known CAD systems under structural and technological constraints is carried out. The revealed significant constraints are related to the thermal strength of the wires and possible mutual influence through the electromagnetic field. When manually designing the designer guided by his own experience, can ignore these and other constraints. Unlike a person, the autorouter strictly fulfills all the specified constraints, which, given the topology of the printed circuit board, does not allow tracing to complete. On the other hand, giving greater freedom to the autorouter often makes it impossible to meet the production requirements on permissible parameters of the topological pat-tern, which is the width of the conductors and the gaps between them. The problem of tracing printed circuit boards, including multilayer ones, has become much more complicated with the introduction of integrated circuits in TSOP, MOFP and BGA type enclosures packages with fine-pitch pins, a number of which can reach several hundred. The article investigates the possibility of maximizing printed circuit board topological space with these and other types of enclosures. The necessity of introducing a buffer zone around the component to improve the routing efficiency is explained. It is shown, however, that the avail-ability of a buffer zone does not eliminate the appearance of vias in it, the number of which depends on the routing type. On the basis of the proposed criterion for the autorouter performance, i.e. the ratio of the total wire length to the number of vias, the efficiency of using the topological space of a printed circuit board by three autorouters is analyzed.The presented experimental results of competing routing systems TopoR and Specctra confirmed the possibility to enlarge the pattern area of the printed circuit board for its further use.


2008 ◽  
Vol 130 (1) ◽  
Author(s):  
Dezhi Li ◽  
Changqing Liu ◽  
Paul P. Conway

The reliability of fine pitch Sn–3.8Ag–0.7Cu flip chip solder joints with three different pads, i.e., bare pads, pads with solder masks, and pads with microvia, on printed circuit boards (PCBs) was studied through thermal cycling. After assembly, (Au,Ni)Sn4 intermetallics (IMCs) formed both in the bulk solder and at the interfaces due to the immersion-Au finish on the PCB side. The (Au,Ni)Sn4 IMCs formed in the solder joints on the pads with microvia were more abundant than those formed in the solder joints on the pads without microvia. The results showed that the solder joints on the pads with a microvia had poor reliability due to the insufficient solder volume and the formation of large amounts of (Au,Ni)Sn4 IMCs. The main crack initiation position was the corner of solder joint at the chip side. For the pads with microvia, the main location of failure was at the (Au,Ni)Sn4/solder interface on the chip side, and for the solder joints on bare pads and pads with solder mask, the possible failure location was in the bulk solder.


2008 ◽  
Vol 128 (11) ◽  
pp. 657-662 ◽  
Author(s):  
Tsuyoshi Maeno ◽  
Yukihiko Sakurai ◽  
Takanori Unou ◽  
Kouji Ichikawa ◽  
Osamu Fujiwara

Sign in / Sign up

Export Citation Format

Share Document