scholarly journals Concise Read-Only Specifications for Better Synthesis of Programs with Pointers

Author(s):  
Andreea Costea ◽  
Amy Zhu ◽  
Nadia Polikarpova ◽  
Ilya Sergey

AbstractIn program synthesis there is a well-known trade-off between concise and strong specifications: if a specification is too verbose, it might be harder to write than the program; if it is too weak, the synthesised program might not match the user’s intent. In this work we explore the use of annotations for restricting memory access permissions in program synthesis, and show that they can make specifications much stronger while remaining surprisingly concise. Specifically, we enhance Synthetic Separation Logic (SSL), a framework for synthesis of heap-manipulating programs, with the logical mechanism of read-only borrows.We observe that this minimalistic and conservative SSL extension benefits the synthesis in several ways, making it more (a) expressive (stronger correctness guarantees are achieved with a modest annotation overhead), (b) effective (it produces more concise and easier-to-read programs), (c) efficient (faster synthesis), and (d) robust (synthesis efficiency is less affected by the choice of the search heuristic). We explain the intuition and provide formal treatment for read-only borrows. We substantiate the claims (a)–(d) by describing our quantitative evaluation of the borrowing-aware synthesis implementation on a series of standard benchmark specifications for various heap-manipulating programs.

Author(s):  
Shabana Aqueel ◽  
Kavita Khare

The paper presents the implementation of compliant DDR3 memory controller. It discusses the overall architecture of the DDR3 controller along with the detailed design and operation of its individual sub blocks, the pipelining implemented in the design to increase the design throughput. It also discusses the advantages of DDR3 memories over DDR2 memories operation. Double Data Rate (DDR) SDRAMs have been prevalent in the PC memory market in recent years and are widely used for networking systems. These memory devices are rapidly developing, with high density, high memory bandwidth and low device cost. However, because of the high-speed interface technology and complex instruction-based memory access control, a specific purpose memory controller is necessary for optimizing the memory access trade off. In this paper, a specific purpose DDR3 controller for highperformance is proposed.


Sensors ◽  
2021 ◽  
Vol 21 (22) ◽  
pp. 7771
Author(s):  
Jinjae Lee ◽  
Derry Pratama ◽  
Minjae Kim ◽  
Howon Kim ◽  
Donghyun Kwon

Commodity processor architectures are releasing various instruction set extensions to support security solutions for the efficient mitigation of memory vulnerabilities. Among them, tagged memory extension (TME), such as ARM MTE and SPARC ADI, can prevent unauthorized memory access by utilizing tagged memory. However, our analysis found that TME has performance and security issues in practical use. To alleviate these, in this paper, we propose CoMeT, a new instruction set extension for tagged memory. The key idea behind CoMeT is not only to check whether the tag values in the address tag and memory tag are matched, but also to check the access permissions for each tag value. We implemented the prototype of CoMeT on the RISC-V platform. Our evaluation results confirm that CoMeT can be utilized to efficiently implement well-known security solutions, i.e., shadow stack and in-process isolation, without compromising security.


2021 ◽  
Vol 5 (ICFP) ◽  
pp. 1-29
Author(s):  
Yasunari Watanabe ◽  
Kiran Gopinathan ◽  
George Pîrlea ◽  
Nadia Polikarpova ◽  
Ilya Sergey

Automated deductive program synthesis promises to generate executable programs from concise specifications, along with proofs of correctness that can be independently verified using third-party tools. However, an attempt to exercise this promise using existing proof-certification frameworks reveals significant discrepancies in how proof derivations are structured for two different purposes: program synthesis and program verification. These discrepancies make it difficult to use certified verifiers to validate synthesis results, forcing one to write an ad-hoc translation procedure from synthesis proofs to correctness proofs for each verification backend. In this work, we address this challenge in the context of the synthesis and verification of heap-manipulating programs. We present a technique for principled translation of deductive synthesis derivations (a.k.a. source proofs) into deductive target proofs about the synthesised programs in the logics of interactive program verifiers. We showcase our technique by implementing three different certifiers for programs generated via SuSLik, a Separation Logic-based tool for automated synthesis of programs with pointers, in foundational verification frameworks embedded in Coq: Hoare Type Theory (HTT), Iris, and Verified Software Toolchain (VST), producing concise and efficient machine-checkable proofs for characteristic synthesis benchmarks.


2019 ◽  
Vol 10 (1) ◽  
Author(s):  
Matthew Connors ◽  
Ting Yang ◽  
Ahmed Hosny ◽  
Zhifei Deng ◽  
Fatemeh Yazdandoost ◽  
...  

AbstractMan-made armors often rely on rigid structures for mechanical protection, which typically results in a trade-off with flexibility and maneuverability. Chitons, a group of marine mollusks, evolved scaled armors that address similar challenges. Many chiton species possess hundreds of small, mineralized scales arrayed on the soft girdle that surrounds their overlapping shell plates. Ensuring both flexibility for locomotion and protection of the underlying soft body, the scaled girdle is an excellent model for multifunctional armor design. Here we conduct a systematic study of the material composition, nanomechanical properties, three-dimensional geometry, and interspecific structural diversity of chiton girdle scales. Moreover, inspired by the tessellated organization of chiton scales, we fabricate a synthetic flexible scaled armor analogue using parametric computational modeling and multi-material 3D printing. This approach allows us to conduct a quantitative evaluation of our chiton-inspired armor to assess its orientation-dependent flexibility and protection capabilities.


Physica ◽  
1952 ◽  
Vol 18 (2) ◽  
pp. 1147-1150
Author(s):  
D MAEDER ◽  
V WINTERSTEIGER

1982 ◽  
Vol 14 (2) ◽  
pp. 109-113 ◽  
Author(s):  
Suleyman Tufekci
Keyword(s):  

2012 ◽  
Vol 11 (3) ◽  
pp. 118-126 ◽  
Author(s):  
Olive Emil Wetter ◽  
Jürgen Wegge ◽  
Klaus Jonas ◽  
Klaus-Helmut Schmidt

In most work contexts, several performance goals coexist, and conflicts between them and trade-offs can occur. Our paper is the first to contrast a dual goal for speed and accuracy with a single goal for speed on the same task. The Sternberg paradigm (Experiment 1, n = 57) and the d2 test (Experiment 2, n = 19) were used as performance tasks. Speed measures and errors revealed in both experiments that dual as well as single goals increase performance by enhancing memory scanning. However, the single speed goal triggered a speed-accuracy trade-off, favoring speed over accuracy, whereas this was not the case with the dual goal. In difficult trials, dual goals slowed down scanning processes again so that errors could be prevented. This new finding is particularly relevant for security domains, where both aspects have to be managed simultaneously.


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