Nemo: Energy Efficient Location Tracker for Dementia Patients Using LoRaWAN and Adaptive GPS Duty Cycling Strategies

2021 ◽  
pp. 511-521
Author(s):  
Riboy Cheriyan ◽  
Joel Abraham ◽  
E. Sree Sankar ◽  
Sandeep Narayanan ◽  
Reuben George Mathai
2013 ◽  
Vol 3 (1-4) ◽  
pp. 54-62 ◽  
Author(s):  
Julien Beaudaux ◽  
Antoine Gallais ◽  
Thomas Noël

Sensors ◽  
2021 ◽  
Vol 21 (7) ◽  
pp. 2349
Author(s):  
Roberto Rodriguez-Zurrunero ◽  
Alvaro Araujo ◽  
Madeleine M. Lowery

The identification of a new generation of adaptive strategies for deep brain stimulation (DBS) will require the development of mixed hardware–software systems for testing and implementing such controllers clinically. Towards this aim, introducing an operating system (OS) that provides high-level features (multitasking, hardware abstraction, and dynamic operation) as the core element of adaptive deep brain stimulation (aDBS) controllers could expand the capabilities and development speed of new control strategies. However, such software frameworks also introduce substantial power consumption overhead that could render this solution unfeasible for implantable devices. To address this, in this work four techniques to reduce this overhead are proposed and evaluated: a tick-less idle operation mode, reduced and dynamic sampling, buffered read mode, and duty cycling. A dual threshold adaptive deep brain stimulation algorithm for suppressing pathological oscillatory neural activity was implemented along with the proposed energy saving techniques on an energy-efficient OS, YetiOS, running on a STM32L476RE microcontroller. The system was then tested using an emulation environment coupled to a mean field model of the parkinsonian basal ganglia to simulate local field potential (LFPs) which acted as a biomarker for the controller. The OS-based controller alone introduced a power consumption overhead of 10.03 mW for a sampling rate of 1 kHz. This was reduced to 12 μW by applying the proposed tick-less idle mode, dynamic sampling, buffered read and duty cycling techniques. The OS-based controller using the proposed methods can facilitate rapid and flexible testing and implementation of new control methods. Furthermore, the approach has the potential to become a central element in future implantable devices to enable energy-efficient implementation of a wide range of control algorithms across different neurological conditions and hardware platforms.


Sensors ◽  
2020 ◽  
Vol 20 (5) ◽  
pp. 1540 ◽  
Author(s):  
Ramadhani Sinde ◽  
Feroza Begum ◽  
Karoli Njau ◽  
Shubi Kaijage

Over the recent era, Wireless Sensor Network (WSN) has attracted much attention among industrialists and researchers owing to its contribution to numerous applications including military, environmental monitoring and so on. However, reducing the network delay and improving the network lifetime are always big issues in the domain of WSN. To resolve these downsides, we propose an Energy-Efficient Scheduling using the Deep Reinforcement Learning (DRL) (E2S-DRL) algorithm in WSN. E2S-DRL contributes three phases to prolong network lifetime and to reduce network delay that is: the clustering phase, duty-cycling phase and routing phase. E2S-DRL starts with the clustering phase where we reduce the energy consumption incurred during data aggregation. It is achieved through the Zone-based Clustering (ZbC) scheme. In the ZbC scheme, hybrid Particle Swarm Optimization (PSO) and Affinity Propagation (AP) algorithms are utilized. Duty cycling is adopted in the second phase by executing the DRL algorithm, from which, E2S-DRL reduces the energy consumption of individual sensor nodes effectually. The transmission delay is mitigated in the third (routing) phase using Ant Colony Optimization (ACO) and the Firefly Algorithm (FFA). Our work is modeled in Network Simulator 3.26 (NS3). The results are valuable in provisions of upcoming metrics including network lifetime, energy consumption, throughput and delay. From this evaluation, it is proved that our E2S-DRL reduces energy consumption, reduces delays by up to 40% and enhances throughput and network lifetime up to 35% compared to the existing cTDMA, DRA, LDC and iABC methods.


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