Analytical Two-Level Near Threshold Cache Exploration for Low Power Biomedical Applications

Communications in Computer and Information Science - Advanced Computer Architecture ◽

10.1007/978-981-13-2423-9_8 ◽

2018 ◽

pp. 95-108

Author(s):

Yun Liang ◽

Shuo Wang ◽

Tulika Mitra ◽

Yajun Ha

Keyword(s):

Low Power ◽

Biomedical Applications ◽

Near Threshold

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A low-power temperature sensing system for implantable biomedical applications

2017 15th IEEE International New Circuits and Systems Conference (NEWCAS) ◽

10.1109/newcas.2017.8010184 ◽

2017 ◽

Cited By ~ 2

Author(s):

Hasan Afkhami Ardakani ◽

Amir Hossein Masnadi Shirazi ◽

Sudip Shekhar ◽

Shahriar Mirabbasi

Keyword(s):

Low Power ◽

Biomedical Applications ◽

Temperature Sensing ◽

Sensing System

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A low power quadrature and divide-by-two frequency VCO design mixer with charge-injection for biomedical applications

2014 7th International Conference on Biomedical Engineering and Informatics ◽

10.1109/bmei.2014.7002841 ◽

2014 ◽

Cited By ~ 14

Author(s):

Wen-Cheng Lai ◽

Jhin-Fang Huang ◽

Pi-Gi Yang ◽

Chien-Ming Hsu ◽

Kuo-Lung Chen

Keyword(s):

Low Power ◽

Biomedical Applications ◽

Charge Injection

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A 1 V 2.5 μW fully-differential ASK demodulator with 12.5 pJ/bit FOM for ultra-low power biomedical applications

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2017.8052923 ◽

2017 ◽

Author(s):

Seungyeob Baik ◽

Arup K. George ◽

Minkyu Je ◽

Junghyup Lee

Keyword(s):

Low Power ◽

Biomedical Applications ◽

Ultra Low Power ◽

Fully Differential

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A Low-Noise, Low-Power, Wide Dynamic Range Logarithmic Amplifier for Biomedical Applications

Journal of Circuits System and Computers ◽

10.1142/s0218126618501049 ◽

2018 ◽

Vol 27 (07) ◽

pp. 1850104 ◽

Cited By ~ 2

Author(s):

Yuwadee Sundarasaradula ◽

Apinunt Thanachayanont

Keyword(s):

Low Power ◽

Biomedical Applications ◽

Dynamic Range ◽

Supply Voltage ◽

Low Noise ◽

Power Supply Voltage ◽

Wide Dynamic Range ◽

Dc Offset ◽

Limiting Amplifier ◽

Logarithmic Amplifier

This paper presents the design and realization of a low-noise, low-power, wide dynamic range CMOS logarithmic amplifier for biomedical applications. The proposed amplifier is based on the true piecewise linear function by using progressive-compression parallel-summation architecture. A DC offset cancellation feedback loop is used to prevent output saturation and deteriorated input sensitivity from inherent DC offset voltages. The proposed logarithmic amplifier was designed and fabricated in a standard 0.18[Formula: see text][Formula: see text]m CMOS technology. The prototype chip includes six limiting amplifier stages and an on-chip bias generator, occupying a die area of 0.027[Formula: see text]mm2. The overall circuit consumes 9.75[Formula: see text][Formula: see text]W from a single 1.5[Formula: see text]V power supply voltage. Measured results showed that the prototype logarithmic amplifier exhibited an 80[Formula: see text]dB input dynamic range (from 10[Formula: see text][Formula: see text]V to 100[Formula: see text]mV), a bandwidth of 4[Formula: see text]Hz–10[Formula: see text]kHz, and a total input-referred noise of 5.52[Formula: see text][Formula: see text]V.

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