Tuned Universal Filter Design Using Single Differential Difference Current Conveyor for Sub-GHz Frequency Band

Author(s):  
Shalini Mishra ◽  
Devarshi Shukla ◽  
Vijaya Bhaduaria ◽  
Santosh Kumar Gupta
2019 ◽  
Vol 25 (6) ◽  
pp. 28-34 ◽  
Author(s):  
Jan Dvorak ◽  
David Kubanek ◽  
Norbert Herencsar ◽  
Aslihan Kartci ◽  
Panagiotis Bertsias

This paper presents a design of the controllable emulator of the FOC (Fractional-Order Capacitor) and its application. The circuit is based on 5th-order RC topology (type Foster I), where the passive elements in the topology are replaced by electronically adjustable components. The proposed emulator is based on OTA (Operational Transconductance Amplifier) and VDCC (Voltage Differencing Current Conveyor). The electronically controllable resistors are implemented by OTAs. The electronically tunable capacitors are implemented using capacitance multipliers, which employ VDCCs. The proposed structure provides the electronic control of the order and electronic shifting of the frequency band of the approximation validity. The proposed FOC emulator is also used for fractional-order filter design. The proposed circuits are verified using PSpice simulations.


2021 ◽  
Vol 25 (2) ◽  
pp. 65-76
Author(s):  
Tajinder Singh Arora ◽  

This research article explores the possible applications of voltage differencing current conveyor (VDCC), as a current mode universal filter and a sinusoidal oscillator. Without the need for an additional active/passive element, a very simple hardware modification makes it a dual-mode quadrature oscillator from the filter configuration. Both the proposed circuit requires only two VDCC and all grounded passive elements, hence a preferable choice for integration. The filter has some desirable features such as availability of all five explicit outputs, independent tunability of filter parameters. Availability of explicit quadrature current outputs, independence in start and frequency of oscillations, makes it a better oscillator design. Apart from prevalent CMOS simulation results, VDCC is also realized and experimentally tested using the off-the-shelf integrated circuit. All the pen and paper analysis such as non-ideal, sensitivity and parasitic analysis supports the design.


2011 ◽  
Vol 02 (03) ◽  
pp. 210-216 ◽  
Author(s):  
Sudhanshu Maheshwari ◽  
Ankita Gangwar

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