Strengthening hardware implementations of NTRUEncrypt against fault analysis attacks

2013 ◽  
Vol 3 (4) ◽  
pp. 227-240 ◽  
Author(s):  
Abdel Alim Kamal ◽  
Amr M. Youssef
Information ◽  
2021 ◽  
Vol 12 (10) ◽  
pp. 433
Author(s):  
Kazuki Nakamura ◽  
Koji Hori ◽  
Shoichi Hirose

Cryptographic hash functions play an essential role in various aspects of cryptography, such as message authentication codes, pseudorandom number generation, digital signatures, and so on. Thus, the security of their hardware implementations is an important research topic. Hao et al. proposed an algebraic fault analysis (AFA) for the SHA-256 compression function in 2014. They showed that one could recover the whole of an unknown input of the SHA-256 compression function by injecting 65 faults and analyzing the outputs under normal and fault injection conditions. They also presented an almost universal forgery attack on HMAC-SHA-256 using this result. In our work, we conducted computer experiments for various fault-injection conditions in the AFA for the SHA-256 compression function. As a result, we found that one can recover the whole of an unknown input of the SHA-256 compression function by injecting an average of only 18 faults on average. We also conducted an AFA for the SHACAL-2 block cipher and an AFA for the SHA-256 compression function, enabling almost universal forgery of the chopMD-MAC function.


Author(s):  
Christof Beierle ◽  
Gregor Leander ◽  
Amir Moradi ◽  
Shahram Rasoolzadeh

Traditionally, countermeasures against physical attacks are integrated into the implementation of cryptographic primitives after the algorithms have been designed for achieving a certain level of cryptanalytic security. This picture has been changed by the introduction of PICARO, ZORRO, and FIDES, where efficient protection against Side-Channel Analysis (SCA) attacks has been considered in their design. In this work we present the tweakable block cipher CRAFT: the efficient protection of its implementations against Differential Fault Analysis (DFA) attacks has been one of the main design criteria, while we provide strong bounds for its security in the related-tweak model. Considering the area footprint of round-based hardware implementations, CRAFT outperforms the other lightweight ciphers with the same state and key size. This holds not only for unprotected implementations but also when fault-detection facilities, side-channel protection, and their combination are integrated into the implementation. In addition to supporting a 64-bit tweak, CRAFT has the additional property that the circuit realizing the encryption can support the decryption functionality as well with very little area overhead.


2008 ◽  
Vol 1 (3) ◽  
pp. 36-44
Author(s):  
M. Rizwan Khan ◽  
Atif Iqbal ◽  
Mukhtar Ahmad

Author(s):  
Steve K. Hsiung ◽  
Kevan V. Tan ◽  
Andrew J. Komrowski ◽  
Daniel J. D. Sullivan ◽  
Jan Gaudestad

Abstract Scanning SQUID (Superconducting Quantum Interference Device) Microscopy, known as SSM, is a non-destructive technique that detects magnetic fields in Integrated Circuits (IC). The magnetic field, when converted to current density via Fast Fourier Transform (FFT), is particularly useful to detect shorts and high resistance (HR) defects. A short between two wires or layers will cause the current to diverge from the path the designer intended. An analyst can see where the current is not matching the design, thereby easily localizing the fault. Many defects occur between or under metal layers that make it impossible using visible light or infrared emission detecting equipment to locate the defect. SSM is the only tool that can detect signals from defects under metal layers, since magnetic fields are not affected by them. New analysis software makes it possible for the analyst to overlay design layouts, such as CAD Knights, directly onto the current paths found by the SSM. In this paper, we present four case studies where SSM successfully localized short faults in advanced wire-bond and flip-chip packages after other fault analysis methods failed to locate the defects.


Author(s):  
P. Perdu ◽  
G. Perez ◽  
M. Dupire ◽  
B. Benteo

Abstract To debug ASIC we likely use accurate tools such as an electron beam tester (Ebeam tester) and a Focused Ion Beam (FIB). Interactions between ions or electrons and the target device build charge up on its upper glassivation layer. This charge up could trigger several problems. With Ebeam testing, it sharply decreases voltage contrast during Image Fault Analysis and hide static voltage contrast. During ASIC reconfiguration with FIB, it could induce damages in the glassivation layer. Sample preparation is getting a key issue and we show how we can deal with it by optimizing carbon coating of the devices. Coating is done by an evaporator. For focused ion beam reconfiguration, we need a very thick coating. Otherwise the coating could be sputtered away due to imaging. This coating is use either to avoid charge-up on glassivated devices or as a sacrificial layer to avoid short circuits on unglassivated devices. For electron beam Testing, we need a very thin coating, we are now using an electrical characterization method with an insitu control system to obtain the right thin thickness. Carbon coating is a very cheap and useful method for sample preparation. It needs to be tuned according to the tool used.


2018 ◽  
Author(s):  
VK. Srivastava ◽  
Lakhan Singh ◽  
Sunil Singh

2020 ◽  
Vol 181 ◽  
pp. 03006
Author(s):  
Nduwamungu Aphrodis ◽  
Ntagwirumugara Etienne ◽  
Utetiwabo Wellars ◽  
Mulolani Francis

Faults in electrical power systems are among the key factors and sources to network disturbances, however control strategies are among key faults clearing techniques for the sake of safe operational mode of the system.Some researchers have shown various limitations of control strategies such as slow dynamic response,inability to switch Off and On network remotely and fault clearing time. For a system with wind energy technologies, if the power flow of a wind turbine is interrupted by a fault, the intermediate-circuit voltage between the machine-side converter and line-side converter will fall in unacceptably high values.To overcome the aforementioned issues, this paper used a Matlab simulations and experiments in order to analyze and validate the results.The results showed that fault ride through (FRT) with SCADA Viewer software are more adaptable to the variations of voltage and wind speed in order to avoid loss of synchronism. Therefore at the speed of 12.5m/s a wind produced a rated power of 750W and remained in synchronization before and after a fault created and cleared but worked as generator meanwhile at speed of 3.4m/s wind disconnected from grid and started working as a motor and consumed active power (P=-25watts) and voltage dip at 100% .For the protection purpose, the DC chopper and crowbar should be integrated towards management of excess energy during faults cases.


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