Self-assembled nano-scale multilayer formation using physical vapor deposition methods

2006 ◽  
Vol 242 (1-2) ◽  
pp. 261-264 ◽  
Author(s):  
C. Ronning ◽  
I. Gerhards ◽  
M. Seibt ◽  
H. Hofsäss ◽  
Wan-Yu Wu ◽  
...  
Keyword(s):  
Vapor Deposition ◽  
Physical Vapor Deposition ◽  
Nano Scale ◽  
Self Assembled ◽  
Multilayer Formation

Kinetic Monte Carlo Simulation of Metallic Nanoislands Grown by Physical Vapor Deposition

2011 ◽  
Vol 9 (1) ◽  
pp. 49-67 ◽  
Author(s):  
Abuhanif K. Bhuiyan ◽  
S. K. Dew ◽  
M. Stepanova
Keyword(s):  
Vapor Deposition ◽  
Physical Vapor Deposition ◽  
Kinetic Monte Carlo ◽  
Substrate Material ◽  
Film Deposition ◽  
Process Conditions ◽  
Control Factors ◽  
Critical Process Parameters ◽  
Self Assembled ◽  
Surface Morphologies

AbstractWe report kinetic Monte-Karlo (KMC) simulation of self-assembled synthesis of nanocrystals by physical vapor deposition (PVD), which is one of most flexible, efficient, and clean techniques to fabricate nanopatterns. In particular, self-assembled arrays of nanocrystals can be synthesized by PVD. However size, shape and density of self-assembled nanocrystals are highly sensitive to the process conditions such as duration of deposition, temperature, substrate material, etc. To efficiently synthesize nanocrystalline arrays by PVD, the process control factors should be understood in detail. KMC simulations of film deposition are an important tool for understanding the mechanisms of film deposition. In this paper, we report a KMC modeling that explicitly represents PVD synthesis of self-assembled nanocrystals. We study how varying critical process parameters such as deposition rate, duration, temperature, and substrate type affect the lateral 2D morphologies of self-assembled metallic islands on substrates, and compare our results with experimentally observed surface morphologies generated by PVD. Our simulations align well with experimental results reported in the literature.

Trends of Nanoclusters' Growth by Physical Vapor Deposition Studied by Atomistic Simulation

2009 ◽  
Vol 1177 ◽  
Author(s):  
Abuhanif Bhuiyan ◽  
Steven K. Dew ◽  
Maria Stepanova
Keyword(s):  
Vapor Deposition ◽  
Computer Aided Design ◽  
Physical Vapor Deposition ◽  
Kinetic Monte Carlo ◽  
Substrate Material ◽  
Process Conditions ◽  
Control Factors ◽  
Crucial Component ◽  
Self Assembled ◽  
Controllable Fabrication

AbstractEfficient methodologies for synthesis of nanocrystals (NC) are a crucial component for creation of nanostructured electronic components. Physical vapor deposition (PVD) is one of the most flexible techniques to fabricate self-assembled arrangements of nanoclusters. Controllable fabrication of such assemblies can improve reliability of nanocapacitors, enhance performance of magnetic memories, and has many applications in opto-electronics devices, etc. However, size, shape and density of nanocrystals are highly sensitive to the process conditions such as duration of deposition, temperature, substrate material, etc. To efficiently synthesize nanocrystalline arrays by PVD, the process control factors should be understood in greater detail. In this work, we present a kinetic Monte Carlo (KMC) model and report simulations that explicitly represent the PVD synthesis of nanocrystals on substrates. Here we study how varying the most important process parameters affects the morphologies of self-assembled metallic islands on substrates. We compare our results with experimentally observed surface morphologies generated by PVD and demonstrate that KMC models like this are an efficient tool for computer-aided design of PVD processes for synthesis of nanocrystals.

The Integration Solution of Copper Barrier Deposition for Nanometer Interconnect Process

2008 ◽  
Vol 8 (5) ◽  
pp. 2500-2504
Author(s):  
Kei-Wei Chen ◽  
Ying-Lang Wang ◽  
Jung-Chih Tsao ◽  
Kuang-Yao Lo
Keyword(s):  
Vapor Deposition ◽  
Physical Vapor Deposition ◽  
Deposition Process ◽  
Film Properties ◽  
Seeding Layer ◽  
Process Step ◽  
Nano Scale ◽  
Layer Deposition ◽  
Line Flow ◽  
Grain Size And Orientation

As the dimensions of devices are shrunk quickly, the requirements of metallization become more critical. For VIA barrier and seeding layer filling and deposition, the process was mostly applied with the copper physical vapor deposition methodology in the back-end of line flow of the interconnection metallization. The criteria for barrier and seeding layer deposition are the metal continuity inside the VIA feature and grain size and orientation control for film diffusion barrier and qualities. Besides, while the interconnection size shrunk to nano-scale, the barrier thickness would be very thinner to maintain the VIA resistance; however, it would face the film conformity and continuity consistence within the wafer and different features. The integration solution would be developed and studied with the re-sputter process step adding into the convectional physical vapor deposition process. The resputter process step could not only improve the film conformity and continuity in the VIA's sidewall; but also reduce the resistance of VIA feature over 20%. The improvement of the resputter method adding into the deposition process would be contributed to the standard barrier deposition in the nano-scale feature of the interconnect. Besides, we also discussed the effect of the film properties after the resputter process introduced into the barrier deposition.

TEM characterization of WSix films

1994 ◽  
Vol 52 ◽  
pp. 848-849
Author(s):  
V. C. Kannan ◽  
S. M. Merchant ◽  
R. B. Irwin ◽  
A. K. Nanda ◽  
M. Sundahl ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Vapor Deposition ◽  
High Purity ◽  
Physical Vapor Deposition ◽  
Thermal Treatments ◽  
Rapid Thermal Anneal ◽  
Tungsten Silicide ◽  
Tem Characterization ◽  
Metal Silicides

Metal silicides such as WSi2, MoSi2, TiSi2, TaSi2 and CoSi2 have received wide attention in recent years for semiconductor applications in integrated circuits. In this study, we describe the microstructures of WSix films deposited on SiO2 (oxide) and polysilicon (poly) surfaces on Si wafers afterdeposition and rapid thermal anneal (RTA) at several temperatures. The stoichiometry of WSix films was confirmed by Rutherford Backscattering Spectroscopy (RBS). A correlation between the observed microstructure and measured sheet resistance of the films was also obtained.WSix films were deposited by physical vapor deposition (PVD) using magnetron sputteringin a Varian 3180. A high purity tungsten silicide target with a Si:W ratio of 2.85 was used. Films deposited on oxide or poly substrates gave rise to a Si:W ratio of 2.65 as observed by RBS. To simulatethe thermal treatments of subsequent processing procedures, wafers with tungsten silicide films were subjected to RTA (AG Associates Heatpulse 4108) in a N2 ambient for 60 seconds at temperatures ranging from 700° to 1000°C.

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