Single and compact ESD device Beta-Matrix solution based on bidirectional SCR Network in advanced 28/32 nm technology node

Metastable beta titanium alloys have been known to have numerous advantages such as cold formability, high strength, good fracture resistance, deep hardenability, and cost effectiveness. Very high strength is obtainable by precipitation of the hexagonal alpha phase in a bcc beta matrix in these alloys. Precipitation hardening in the metastable beta alloys may also result from the formation of transition phases such as omega phase. Ti-15-3 (Ti-15V- 3Cr-3Al-3Sn) has been developed recently by TIMET and USAF for low cost sheet metal applications. The purpose of the present study was to examine the aging characteristics in this alloy.The composition of the as-received material is: 14.7 V, 3.14 Cr, 3.05 Al, 2.26 Sn, and 0.145 Fe. The beta transus temperature as determined by optical metallographic method was about 770°C. Specimen coupons were prepared from a mill-annealed 1.2 mm thick sheet, and solution treated at 827°C for 2 hr in argon, then water quenched. Aging was also done in argon at temperatures ranging from 316 to 616°C for various times.

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Root Cause Analysis for Pin Leakage

ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2016p0217 ◽

2016 ◽

Author(s):

Zhigang Song ◽

Jochonia Nxumalo ◽

Manuel Villalobos ◽

Sweta Pendyala

Keyword(s):

Failure Analysis ◽

Root Cause Analysis ◽

Advanced Technology ◽

Process Step ◽

Cause Analysis ◽

Hard Mask ◽

Technology Node ◽

Root Cause ◽

Tools And Techniques

Abstract Pin leakage continues to be on the list of top yield detractors for microelectronics devices. It is simply manifested as elevated current with one pin or several pins during pin continuity test. Although many techniques are capable to globally localize the fault of pin leakage, root cause analysis and identification for it are still very challenging with today’s advanced failure analysis tools and techniques. It is because pin leakage can be caused by any type of defect, at any layer in the device and at any process step. This paper presents a case study to demonstrate how to combine multiple techniques to accurately identify the root cause of a pin leakage issue for a device manufactured using advanced technology node. The root cause was identified as under-etch issue during P+ implantation hard mask opening for ESD protection diode, causing P+ implantation missing, which was responsible for the nearly ohmic type pin leakage.

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Ultra-Fine Grained Ti-15Mo Alloy Prepared by Powder Metallurgy

Materials Science Forum ◽

10.4028/www.scientific.net/msf.941.1276 ◽

2018 ◽

Vol 941 ◽

pp. 1276-1281

Author(s):

Anna Terynková ◽

Jiří Kozlík ◽

Kristína Bartha ◽

Tomáš Chráska ◽

Josef Stráský

Keyword(s):

Powder Metallurgy ◽

Bulk Material ◽

Alpha Phase ◽

Full Density ◽

Fine Grained ◽

Cryogenic Milling ◽

Aircraft Manufacturing ◽

Plasma Sintering ◽

Beta Matrix ◽

Spark Plasma

Ti-15Mo alloy belongs to metastable β-Ti alloys that are currently used in aircraft manufacturing and Ti15Mo alloy is a perspective candidate for the use in medicine thanks to its biotolerant composition. In this study, Ti15Mo alloy was prepared by advanced techniques of powder metallurgy. The powder of gas atomized Ti-15Mo alloy was subjected to cryogenic milling to achieve ultra-fine grained microstructure within the powder particles. Powder was subsequently compacted using spark plasma sintering (SPS). The effect of cryogenic milling on the microstructure and phase composition of final bulk material after SPS was studied by scanning electron microscopy. Sintering at 750°C was not sufficient for achieving full density in gas atomized powder, while milled material could be successfully sintered at this temperature. Alpha phase particles precipitated during sintering and their size, as well as the size of beta matrix grains, was strongly affected by the sintering temperature.

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CDM Protection Test Structure for I/O Cells in a Submicronic Technology

Electronics ◽

10.3390/electronics10040443 ◽

2021 ◽

Vol 10 (4) ◽

pp. 443

Author(s):

Mihaela-Daniela Dobre ◽

Philippe Coll ◽

Gheorghe Brezeanu

Keyword(s):

Electrostatic Discharge ◽

New Technology ◽

Test Chip ◽

Technology Node ◽

Ground Resistance ◽

Maximum Resistance ◽

Device Model ◽

Protection Method ◽

Esd Protection ◽

Protection Devices

This paper proposes an investigation of a CDM (charge device model) electrostatic discharge (ESD) protection method used in submicronic input–output (I/O) structures. The modeling of the commonly used ESD protection devices as well as the modeling of the breakdown caused by ESD is not accurate using traditional commercial tools, hence the need for test-chip implementation, whenever a new technology node is used in production. The proposed method involves defining, implementing, testing, and concluding on one test-chip structure named generically “CDM ground resistance”. The structure assesses the maximum ground resistance allowed for the considered technology for which CDM protection is assured. The findings are important because they will be actively used as CDM protection for all I/O structures developed in the considered submicronic technology node. The paper will conclude on the constraints in terms of maximum resistance of ground metal track allowed to be CDM protected.

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