Comprehensive board-level solder joint reliability modeling and testing of QFN and PowerQFN packages

2003 ◽  
Vol 43 (8) ◽  
pp. 1329-1338 ◽  
Author(s):  
Tong Yan Tee ◽  
Hun Shen Ng ◽  
Daniel Yap ◽  
Zhaowei Zhong
2003 ◽  
Vol 43 (7) ◽  
pp. 1117-1123 ◽  
Author(s):  
Tong Yan Tee ◽  
Hun Shen Ng ◽  
Daniel Yap ◽  
Xavier Baraton ◽  
Zhaowei Zhong

Author(s):  
Saketh Mahalingam ◽  
Ashutosh Joshi ◽  
Joseph Lacey ◽  
Kunal Goray

Chip Scale Packages (CSP) are ideal intermediates between Direct Chip Attach (DCA) and Ball Grid Array (BGA) technologies in terms of both size and cost. Depending upon the application, chip scale packages are either underfilled for better solder joint reliability or are attached with a heat sink to keep the operating temperature of the chip under control. In many applications, as discussed in this paper, both an underfill and a heat sink are required. Quite expectedly the addition of two more materials, heat sink and adhesive, in the board level assembly results in fresh reliability concerns. In particular, the requirements on the underfill material and the heat sink attach adhesive are more rigorous and needless to say, a proper understanding of process and material issues is needed to make such a choice. The inelastic strains experienced by the solder joint (related to the underfill) and the peeling stresses at the heat sink attach adhesive interfaces (related to the thermal adhesive) are used as metric for comparing the number of material choices that are available. Based on the results, it is shown that it is important to choose materials that are thermo-mechanically matched with the rest of the system.


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