A 24-bit delta–sigma ADC with an ultra-low noise chopper-stabilized programmable gain instrumentation amplifier

2001 ◽  
Vol 23 (2) ◽  
pp. 123-128 ◽  
Author(s):  
J.E. Johnston
2021 ◽  
Vol 42 (4) ◽  
pp. 469-472
Author(s):  
Yingtao Yu ◽  
Si Chen ◽  
Qitao Hu ◽  
Paul Solomon ◽  
Zhen Zhang

Electronics ◽  
2019 ◽  
Vol 8 (10) ◽  
pp. 1157 ◽  
Author(s):  
Robert Chebli ◽  
Mohamed Ali ◽  
Mohamad Sawan

We present in this paper a fully integrated low-noise high common-mode rejection ratio (CMRR) logarithmic programmable gain amplifier (LPGA) and chopped LPGA circuits for EEG acquisition systems. The proposed LPGA is based on a rail-to-rail true logarithmic amplifier (TLA) stage. The high CMRR achieved in this work is a result of cascading three amplification stages to construct the LPGA in addition to the lower common-mode gain of the proposed logarithmic amplification topology. In addition, the 1 / f noise and the inherent DC offset voltage of the input transistors are reduced using a chopper stabilization technique. The CMOS 180 nm standard technology is used to implement the circuits. Experimental results for the integrated LPGA show a CMRR of 140 dB, a differential gain of 37 dB, an input-referred noise of 0.754 μ Vrms, a 189 μ W power consumption from 1.8 V power supply and occupies an active area of 0.4 mm 2 .


1991 ◽  
Vol 27 (2) ◽  
pp. 2997-3000 ◽  
Author(s):  
G.M. Daalmans ◽  
L. Bar ◽  
F.R. Bommel ◽  
R. Kress ◽  
D. Uhl
Keyword(s):  

2020 ◽  
Vol 91 (12) ◽  
pp. 123104
Author(s):  
E. A. Williams ◽  
S. Withington ◽  
D. J. Goldie ◽  
C. N. Thomas ◽  
P. A. R. Ade ◽  
...  

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