scholarly journals Analysis of high-order sub-harmonically injection-locked oscillators

2020 ◽  
Vol 12 (8) ◽  
pp. 695-706
Author(s):  
Silvia Hernández ◽  
Mabel Pontón ◽  
Sergio Sancho ◽  
Almudena Suárez
Keyword(s):  
Phase Shift ◽  
Phase Noise ◽  
Oscillation Frequency ◽  
High Order ◽  
Noise Sources ◽  
Oscillation Phase ◽  
Noise Spectral Density ◽  
Input Noise ◽  
Input Source ◽  
Injection Locked Oscillators

AbstractHigh-order sub-harmonically injection-locked oscillators have recently been proposed for low phase-noise frequency generation, with carrier-selection capabilities. Though excellent experimental behavior has been demonstrated, the analysis/simulation of these circuits is demanding, due to the high ratio between the oscillation frequency and the frequency of the input source. This work provides an analysis methodology that covers the main aspects of the circuit behavior, including the detection of the locking bands and the prediction of the phase-noise spectral density. Initially, the oscillator in the presence of a multi-harmonic input source is described with a reduced-order envelope-domain formulation, at the oscillation frequency, based on an oscillator-admittance function extracted from harmonic-balance simulations. This allows deriving an expression for the oscillation phase shift with respect to the input source, and the average of this phase shift is shown to evolve continuously in the distinct synchronization bands obtained when varying a tuning voltage. This property can be used to detect the locking bands in circuit-level envelope-domain simulations, which, as shown here, can be done through different Fourier decompositions and sampling rates. The phase noise of the high-order sub-harmonic injection-locked oscillator under an arbitrary periodic input waveform is investigated in detail. The frequency response to the noise sources is described with a semi-analytical formulation, relying on the oscillator-admittance function in injection-locked conditions. The input noise is derived from the timing jitter of the injection source and the phase-noise response is shown to exhibit a low-pass characteristic, which initially follows the up-converted input noise and then the oscillator own noise sources. A method is proposed to identify the key parameters of the derived phase-noise spectrum from envelope-domain simulations. The various analysis methodologies have been applied to a prototype at 2.7 GHz at the sub-harmonic order N = 30 which has been manufactured and measured.

scholarly journals Characterization and Modeling of DHBT in InP/GaAsSb Technology for the Design and Fabrication of a Ka Band MMIC Oscillator

2012 ◽  
Vol 2012 ◽  
pp. 1-15
Author(s):  
S. Laurent ◽  
J. C. Nallatamby ◽  
M. Prigent ◽  
M. Riet ◽  
V. Nodjiadjim
Keyword(s):  
Phase Noise ◽  
Output Power ◽  
Oscillation Frequency ◽  
Nonlinear Modeling ◽  
Low Frequency ◽  
Heterojunction Bipolar Transistor ◽  
Specific Interest ◽  
Noise Sources ◽  
Measurement Results ◽  
Double Heterojunction

This paper presents the design of an MMIC oscillator operating at a 38 GHz frequency. This circuit was fabricated by the III–V Lab with the new InP/GaAsSb Double Heterojunction Bipolar Transistor (DHBT) submicronic technology (We=700 nm). The transistor used in the circuit has a 15 μm long two-finger emitter. This paper describes the complete nonlinear modeling of this DHBT, including the cyclostationary modeling of its low frequency (LF) noise sources. The specific interest of the methodology used to design this oscillator resides in being able to choose a nonlinear operating condition of the transistor from an analysis in amplifier mode. The oscillator simulation and measurement results are compared. A 38 GHz oscillation frequency with 8.6 dBm output power and a phase noise of −80 dBc/Hz at 100 KHz offset from carrier have been measured.

Stability and Phase-Noise Analysis of Pulsed Injection-Locked Oscillators

2013 ◽  
Vol 61 (1) ◽  
pp. 482-491 ◽  
Author(s):  
Elena Fernandez ◽  
Franco Ramirez ◽  
Almudena Suarez ◽  
Sergio Sancho
Keyword(s):  
Phase Noise ◽  
Noise Analysis ◽  
Pulsed Injection ◽  
Injection Locked Oscillators

scholarly journals Structure of All-Digital Frequency Synthesiser for IoT and IoV Applications

Electronics ◽  
2018 ◽  
Vol 8 (1) ◽  
pp. 29 ◽  
Author(s):  
Marijan Jurgo ◽  
Romualdas Navickas
Keyword(s):  
Phase Noise ◽  
Digital Filter ◽  
High Performance ◽  
Domain Model ◽  
Infinite Impulse Response ◽  
Type I ◽  
Noise Sources ◽  
Digital Frequency ◽  
Digitally Controlled Oscillator ◽  
The Impact

In recent years number of Internet of Things (IoT) services and devices is growing and Internet of Vehicles (IoV) technologies are emerging. Multiband transceiver with high performance frequency synthesisers should be used to support a multitude of existing and developing wireless standards. In this paper noise sources of an all-digital frequency synthesiser are discussed through s-domain model of frequency synthesisers, and the impact of noise induced by main blocks of synthesisers to the overall phase noise of frequency synthesisers is analysed. Requirements for time to digital converter (TDC), digitally controlled oscillator (DCO) and digital filter suitable for all-digital frequency synthesiser for IoT and IoV applications are defined. The structure of frequency synthesisers, which allows us to meet defined requirements, is presented. Its main parts are 2D Vernier TDC based on gated ring oscillators, which can achieve resolution close to 1 ps; multi core LC-tank DCO, whose tuning range is 4.3–5.4 GHz when two cores are used and phase noise is −116.4 dBc/Hz at 1 MHz offset from 5.44 GHz carrier; digital filter made of proportional and integral gain stages and additional infinite impulse response filter stages. Such a structure allows us to achieve a synthesiser’s in-band phase noise lower than −100 dBc/Hz, out-of-band phase noise equal to −134.0 dBc/Hz and allows us to set a synthesiser to type-I or type-II and change its order from first to sixth.

scholarly journals Design of a good oscillation frequency and moderate phase noise current mirror VCO

2020 ◽  
Vol 171 ◽  
pp. 878-886
Author(s):  
Shasanka Sekhar Rout ◽  
Satabdi Acharya ◽  
Kabiraj Sethi
Keyword(s):  
Phase Noise ◽  
Oscillation Frequency ◽  
Current Mirror ◽  
Noise Current

scholarly journals Study of Non-Periodic Pinhole Array Filter for Decreasing High-Order Noise for Compact Holographic Display

2020 ◽  
Vol 10 (23) ◽  
pp. 8671
Author(s):  
Yoo Kwang Kim ◽  
Won Jong Ryu ◽  
Jin Su Lee
Keyword(s):  
Spatial Light Modulator ◽  
Optical Path Length ◽  
Wearable Devices ◽  
Optical Path ◽  
High Order ◽  
Light Modulator ◽  
Noise Sources ◽  
Holographic Display ◽  
Custom Made ◽  
Holographic Displays

The non-periodic pinhole array filtering of a spatial light modulator (SLM) is proposed for filtering the high-order noise and DC noise of a holographic display. Conventionally, DC and high-order noise sources are filtered by a 4f filtering system. Because the 4f filtering system requires a long optical path length, noise filtering is a stumbling block when attempting to realize a compact holographic display. By contrast, the proposed method simply uses a thin filter fabricated by photolithography. In order to verify this concept, we confirmed the feasibility of the filter with a numerical simulation and with a custom-made non-periodic pinhole array filter used in a practical experiment. The proposed method was shown to have the potential to be used in applications ranging from compact wearable devices to table-top holographic displays.

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