Producing methylcyclopentadiene dimer and trimer based high-performance jet fuels using 5-methyl furfural

A206–Al2O3 metal matrix nanocomposite (MMNC) is a promising high performance material with potential applications in various industries, such as automotive, aerospace, and defense. Al2O3 nanoparticles dispersed into molten Al using ultrasonic cavitation technique can enhance the nucleation of primary Al phase to reduce its grain size and modify the secondary intermetallic phases. To enable a scale-up production, an effective yet easy-to-implement quality inspection technique is needed to effectively evaluate the resultant microstructure of the MMNCs. At present the standard inspection technique is based on the microscopic images, which are costly and time-consuming to obtain. This paper investigates the relationship between the ultrasonic attenuation and the microstructures of pure A206 and Al2O3 reinforced MMNCs with/without ultrasonic dispersion. A hypothesis test based on an estimated attenuation variance was developed and it could accurately differentiate poor samples from good ones. This study provides useful guidelines to establish a new quality inspection technique for A206–Al2O3 nanocomposites using ultrasonic nondestructive testing method.

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High-Level Synthesis Design for Stencil Computations on FPGA with High Bandwidth Memory

Electronics ◽

10.3390/electronics9081275 ◽

2020 ◽

Vol 9 (8) ◽

pp. 1275

Author(s):

Changdao Du ◽

Yoshiki Yamaguchi

Keyword(s):

Programming Languages ◽

High Performance ◽

Design Space Exploration ◽

Scale Up ◽

High Level Synthesis ◽

Stencil Computations ◽

Temporal Domain ◽

High Bandwidth ◽

Promising Solution ◽

High Level

Due to performance and energy requirements, FPGA-based accelerators have become a promising solution for high-performance computations. Meanwhile, with the help of high-level synthesis (HLS) compilers, FPGA can be programmed using common programming languages such as C, C++, or OpenCL, thereby improving design efficiency and portability. Stencil computations are significant kernels in various scientific applications. In this paper, we introduce an architecture design for implementing stencil kernels on state-of-the-art FPGA with high bandwidth memory (HBM). Traditional FPGAs are usually equipped with external memory, e.g., DDR3 or DDR4, which limits the design space exploration in the spatial domain of stencil kernels. Therefore, many previous studies mainly relied on exploiting parallelism in the temporal domain to eliminate the bandwidth limitations. In our approach, we scale-up the design performance by considering both the spatial and temporal parallelism of the stencil kernel equally. We also discuss the design portability among different HLS compilers. We use typical stencil kernels to evaluate our design on a Xilinx U280 FPGA board and compare the results with other existing studies. By adopting our method, developers can take broad parallelization strategies based on specific FPGA resources to improve performance.

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Production Cost and Carbon Footprint of Biomass-Derived Dimethylcyclooctane as a High Performance Jet Fuel Blendstock

10.26434/chemrxiv.14761002.v1 ◽

2021 ◽

Author(s):

Nawa Raj Baral ◽

Minliang Yang ◽

Benjamin G. Harvey ◽

Blake A Simmons ◽

Aindrila Mukhopadhyay ◽

...

Keyword(s):

Production Cost ◽

High Performance ◽

Jet Fuel ◽

Liquid Fuels ◽

Jet Fuels ◽

Selling Price ◽

Low Carbon ◽

Hydrogenation Catalysts ◽

Raney Nickel Catalyst ◽

Biomass Sorghum

<div> <div> <div> <p>Near-term decarbonization of aviation requires energy-dense, renewable liquid fuels. Biomass- derived 1,4-dimethylcyclooctane (DMCO), a cyclic alkane with a volumetric net heat of combustion up to 9.2% higher than Jet-A, has the potential to serve as a low-carbon, high- performance jet fuel blendstock that may enable paraffinic bio-jet fuels to operate without aromatic compounds. DMCO can be produced from bio-derived isoprenol (3-methyl-3-buten-1- ol) through a multi-step upgrading process. This study presents detailed process configurations for DMCO production to estimate the minimum selling price and life-cycle greenhouse gas (GHG) footprint considering three different hydrogenation catalysts and two bioconversion pathways. The platinum-based catalyst offers the lowest production cost and GHG footprint of $9.0/L-Jet-Aeq and 61.4 gCO2e/MJ, given the current state of technology. However, when the conversion process is optimized, hydrogenation with a Raney nickel catalyst is preferable, resulting in a $1.5/L-Jet-Aeq cost and 18.3 gCO2e/MJ GHG footprint if biomass sorghum is the feedstock. This price point requires dramatic improvements, including 28 metric-ton/ha sorghum yield and 95-98% of the theoretical maximum conversion of biomass-to-sugars, sugars-to-isoprenol, isoprenol-to-isoprene, and isoprene-to-DMCO. Because increased gravimetric energy density of jet fuels translates to reduced aircraft weight, DMCO also has the potential to improve aircraft efficiency, particularly on long-haul flights. </p> </div> </div> </div>

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Your winning business model agenda: four questions to shape growth

Strategy and Leadership ◽

10.1108/sl-04-2018-0038 ◽

2018 ◽

Vol 46 (4) ◽

pp. 21-27 ◽

Cited By ~ 1

Author(s):

Vladyslav Biloshapka ◽

Oleksiy Osiyevskyy

Keyword(s):

Business Model ◽

High Performance ◽

Design Methodology ◽

Business Models ◽

Scale Up ◽

The Other ◽

Content Type ◽

Current State ◽

Growth Planning ◽

Practical Implications

Purpose Defines clear steps for growth planning that support answers to the crucial question: How and where are you planning to scale up the business and what talent do you need to implement this? Design/methodology/approach As the “Business model value matrix” shows, having ‘happy customers’ is only one determinant of a business model’s success. The other essential block of diagnostic questions deals with the current state and prospects of the firm’s growth. Findings We found that companies that have found ways to keep their business models in a winner’s state can provide clear, evidence-based answers to questions about growth opportunities and risks, while their less successful peers have difficulty addressing the issues. Continuous collecting and analyzing of this information allows successful companies to embrace the strategy-as-learning model of development, built around active learning and proactive adjustment to evolving environment. Practical implications To develop a strategy for moving to and sustaining the Winner state, managers must clearly articulate and test a set of hypotheses about the mechanisms of their company’s growth. The first step on this path is related to obtaining a clear view on the factors that underpin the current financial performance. Originality/value High-performance cultures make sure that each manager has the clear answers to the questions of value, growth and digitization in order to learn, experiment and implement the company business model agenda. The unproductive cultures, on the other hand, are sustained by managerial teams that usually do not have the answers to these crucial questions, but are very good at political games.

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Scale Up of High Performance High Temperature Superconductors

Ceramic Transactions Series - Fabrication of Long-Length and Bulk High-Temperature Superconductors ◽

10.1002/9781118406106.ch2 ◽

2012 ◽

pp. 9-14

Author(s):

V. Selvamanickam ◽

Y. Li ◽

H. G. Lee ◽

X. Xiong ◽

Y. Qiao ◽

...

Keyword(s):

High Temperature ◽

High Performance ◽

High Temperature Superconductors ◽

Scale Up

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Electrodeposition of poly and nanocrystalline Cu-In-Se absorbers for optoelectronic devices

MRS Advances ◽

10.1557/adv.2019.319 ◽

2019 ◽

Vol 4 (37) ◽

pp. 2043-2052

Author(s):

Shalini Menezes ◽

Anura P. Samantilleke ◽

Sharmila J. Menezes ◽

Yi Mo ◽

David S. Albin

Keyword(s):

High Performance ◽

Scale Up ◽

Single Step ◽

Light Emitting ◽

3 Dimensional ◽

Roll To Roll ◽

Dimensional Network ◽

Copper Indium ◽

Ordered Space ◽

Cu Foil

ABSTRACTCoupling semiconductors with electrochemical processes can lead to unusual materials, and attractive, practical device configurations. This work examines the reaction mechanism for single-step electrodeposition approach that creates device quality copper-indium-selenide (CISe) films with either polycrystalline or nanocrystalline morphologies on Cu and steel foils, respectively. The polycrystalline CISe film grows from In3+/Se4+ solution on Cu foil as Cu→ CuxSe→ CuInSe2; it may be used in standard planar pn devices. The nanocrystalline CISe film grown from Cu+/In3+/Se4+ solution follows the CuSe(In)→ CuInSe2→ CuIn3Se5 sequence. The latter approach leads to naturally ordered, space-filling nanocrystals, comprising interconnected 3-dimensional network of sharp, abrupt, p-CISe/n-CISe bulk homojunctions with extraordinary electro-optical attributes. Sandwiching these films between band-aligned contact electrodes can lead to high performance third generation devices for solar cells, light emitting diodes or photoelectrodes for fuel cells. Both approaches produce self-stabilized CISe absorbers that avoid recrystallization steps and can be roll-to-roll processed in simple flexible thin-film form factor for easy scale-up.

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Theoretical and Experimental Sets of Choice Anode/Cathode Architectonics for High-Performance Full-Scale LIB Built-up Models

Nano-Micro Letters ◽

10.1007/s40820-019-0315-8 ◽

2019 ◽

Vol 11 (1) ◽

Cited By ~ 15

Author(s):

H. Khalifa ◽

S. A. El-Safty ◽

A. Reda ◽

M. A. Shenashen ◽

M. M. Selim ◽

...

Keyword(s):

High Performance ◽

Density Functional ◽

Coulombic Efficiency ◽

Density Functional Theory Calculation ◽

Scale Up ◽

Lithium Ion ◽

Building Blocks ◽

High Energy ◽

Full Scale ◽

High Energy Density

Abstract To control the power hierarchy design of lithium-ion battery (LIB) built-up sets for electric vehicles (EVs), we offer intensive theoretical and experimental sets of choice anode/cathode architectonics that can be modulated in full-scale LIB built-up models. As primary structural tectonics, heterogeneous composite superstructures of full-cell-LIB (anode//cathode) electrodes were designed in closely packed flower agave rosettes TiO2@C (FRTO@C anode) and vertical-star-tower LiFePO4@C (VST@C cathode) building blocks to regulate the electron/ion movement in the three-dimensional axes and orientation pathways. The superpower hierarchy surfaces and multi-directional orientation components may create isosurface potential electrodes with mobile electron movements, in-to-out interplay electron dominances, and electron/charge cloud distributions. This study is the first to evaluate the hotkeys of choice anode/cathode architectonics to assemble different LIB–electrode platforms with high-mobility electron/ion flows and high-performance capacity functionalities. Density functional theory calculation revealed that the FRTO@C anode and VST-(i)@C cathode architectonics are a superior choice for the configuration of full-scale LIB built-up models. The integrated FRTO@C//VST-(i)@C full-scale LIB retains a huge discharge capacity (~ 94.2%), an average Coulombic efficiency of 99.85% after 2000 cycles at 1 C, and a high energy density of 127 Wh kg−1, thereby satisfying scale-up commercial EV requirements.

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Supporting the Scale-Up of High Performance Application to Pre-Exascale Systems: The ANTAREX Approach

2019 27th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP) ◽

10.1109/empdp.2019.8671584 ◽

2019 ◽

Author(s):

Cristina Silvano ◽

Giovanni Agosta ◽

Andrea Bartolini ◽

Andrea R. Beccari ◽

Luca Benini ◽

...

Keyword(s):

High Performance ◽

Scale Up ◽

High Performance Application

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HIERARCHICAL MAPPING FOR HPC APPLICATIONS

Parallel Processing Letters ◽

10.1142/s0129626411000229 ◽

2011 ◽

Vol 21 (03) ◽

pp. 279-299 ◽

Cited By ~ 1

Author(s):

I-HSIN CHUNG ◽

CHE-RUNG LEE ◽

JIAZHENG ZHOU ◽

YEH-CHING CHUNG

Keyword(s):

High Performance ◽

Large Scale ◽

Scale Up ◽

Matrix Multiplication ◽

Spectral Graph Theory ◽

Communication Patterns ◽

Fine Tuning ◽

Mapping Algorithm ◽

Communication Time ◽

Run Time

As the high performance computing systems scale up, mapping the tasks of a parallel application onto physical processors to allow efficient communication becomes one of the critical performance issues. Existing algorithms were usually designed to map applications with regular communication patterns. Their mapping criterion usually overlooks the size of communicated messages, which is the primary factor of communication time. In addition, most of their time complexities are too high to process large scale problems. In this paper, we present a hierarchical mapping algorithm (HMA), which is capable of mapping applications with irregular communication patterns. It first partitions tasks according to their run-time communication information. The tasks that communicate with each other more frequently are regarded as strongly connected. Based on their connectivity strength, the tasks are partitioned into supernodes based on the algorithms in spectral graph theory. The hierarchical partitioning reduces the mapping algorithm complexity to achieve scalability. Finally, the run-time communication information will be used again in fine tuning to explore better mappings. With the experiments, we show how the mapping algorithm helps to reduce the point-to-point communication time for the PDGEMM, a ScaLAPACK matrix multiplication computation kernel, up to 20% and the AMG2006, a tier 1 application of the Sequoia benchmark, up to 7%.

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