scholarly journals Silicon-based on-chip four-channel phased-array radar transmitter with ferroelectric thin film at 100 GHz

2019 ◽  
Vol 2019 (19) ◽  
pp. 6231-6234
Author(s):  
Jingtian Liu ◽  
Shuming Chen ◽  
Hui Huang ◽  
Ke Xiao ◽  
Xiaowen Chen
Keyword(s):  
Thin Film ◽  
Phased Array ◽  
Ferroelectric Thin Film ◽  
Phased Array Radar ◽  
On Chip ◽  
Silicon Based

Ferroelectric thin film on a silicon-based pn junction: Coupling photovoltaic properties

2016 ◽  
Vol 500 (1) ◽  
pp. 250-258 ◽  
Author(s):  
Xuedong Li ◽  
Xuemin Wang ◽  
Liping Peng ◽  
Kuibao Zhang ◽  
Weidong Wu ◽  
...  
Keyword(s):  
Thin Film ◽  
Ferroelectric Thin Film ◽  
Photovoltaic Properties ◽  
Pn Junction ◽  
Junction Coupling ◽  
Silicon Based

scholarly journals Design and Implementation of Digital Beam Former Architecture for Phased Array Radar

2022 ◽  
Vol 16 ◽  
pp. 9-13
Author(s):  
D. Govind Rao ◽  
N. S. Murthy ◽  
A. Vengadarajan
Keyword(s):  
High Performance ◽  
Phased Array ◽  
Recursive Least Squares ◽  
Echo Signal ◽  
Complex Arithmetic ◽  
Design And Implementation ◽  
Phased Array Radar ◽  
Critical Components ◽  
On Chip ◽  
Very High

This paper deals with the design and implementation of a digital beam former architecture which is developed for 4/8/12/16 element phased array radar. This technique employs a very high performance FPGA to handle large no of parallel complex arithmetic operations including digital down conversion and filtering. A 3MHz echo signal riding on an IF carrier of 60 MHz is under sampled at 50 MHz and down converted digitally to bring the spectrum to echo signal baseband. After suitable decimation filtering, the I and Q channels are multiplied with Recursive Least Squares based optimized complex weights to form partial beams. The prototype architecture employs techniques of pipelining and parallelism to generate multiple beams simultaneously from a 16 element array within 1 μsec. This can be extended to several number of arrays. The critical components employed in this design are eight 16 bit 125 MS/s ADCs and a very high performance state of the art Xilinx FPGA device Virtex-5 FX 130T having several on-chip resources and 150 MHz clock generators.

On-chip monitoring of far-field patterns using a planar diffractor in a silicon-based optical phased array

2020 ◽  
Vol 45 (21) ◽  
pp. 6058
Author(s):  
Joonsup Shim ◽  
Jong-Bum You ◽  
Hyun-Woo Rhee ◽  
Hyeonho Yoon ◽  
Seong-Hwan Kim ◽  
...  
Keyword(s):  
Phased Array ◽  
Far Field ◽  
Field Patterns ◽  
Optical Phased Array ◽  
On Chip ◽  
Silicon Based

Effect of Forming Gas on Properties of SrBi2Ta2O9 Ferroelectric Thin Film and Powder

2009 ◽  
Vol 24 (4) ◽  
pp. 737-740 ◽  
Author(s):  
Dong-Sheng WANG ◽  
Tao YU ◽  
An HU ◽  
Di WU ◽  
Ai-Dong LI ◽  
...  
Keyword(s):  
Thin Film ◽  
Ferroelectric Thin Film

scholarly journals Double-layer graphene on photonic crystal waveguide electro-absorption modulator with 12 GHz bandwidth

Nanophotonics ◽  
2019 ◽  
Vol 9 (8) ◽  
pp. 2377-2385 ◽  
Author(s):  
Zhao Cheng ◽  
Xiaolong Zhu ◽  
Michael Galili ◽  
Lars Hagedorn Frandsen ◽  
Hao Hu ◽  
...  
Keyword(s):  
Photonic Crystal ◽  
Double Layer ◽  
Slow Light ◽  
Modulation Depth ◽  
Photonic Crystal Waveguide ◽  
Optical Modulators ◽  
Layer Graphene ◽  
Silicon Photonic ◽  
On Chip ◽  
Silicon Based

AbstractGraphene has been widely used in silicon-based optical modulators for its ultra-broadband light absorption and ultrafast optoelectronic response. By incorporating graphene and slow-light silicon photonic crystal waveguide (PhCW), here we propose and experimentally demonstrate a unique double-layer graphene electro-absorption modulator in telecommunication applications. The modulator exhibits a modulation depth of 0.5 dB/μm with a bandwidth of 13.6 GHz, while graphene coverage length is only 1.2 μm in simulations. We also fabricated the graphene modulator on silicon platform, and the device achieved a modulation bandwidth at 12 GHz. The proposed graphene-PhCW modulator may have potentials in the applications of on-chip interconnections.

scholarly journals Development of a Mobile Analytical Chemistry Workstation Using a Silicon Electrochromatography Microchip and Capacitively Coupled Contactless Conductivity Detector

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 239
Author(s):  
Yineng Wang ◽  
Xi Cao ◽  
Walter Messina ◽  
Anna Hogan ◽  
Justina Ugwah ◽  
...  
Keyword(s):  
Capillary Electrochromatography ◽  
High Efficiency ◽  
Device Fabrication ◽  
Capacitively Coupled ◽  
Packaging Design ◽  
Design And Optimization ◽  
Nanofabrication Technique ◽  
On Chip ◽  
Silicon Based ◽  
Rapid Separations

Capillary electrochromatography (CEC) is a separation technique that hybridizes liquid chromatography (LC) and capillary electrophoresis (CE). The selectivity offered by LC stationary phase results in rapid separations, high efficiency, high selectivity, minimal analyte and buffer consumption. Chip-based CE and CEC separation techniques are also gaining interest, as the microchip can provide precise on-chip control over the experiment. Capacitively coupled contactless conductivity detection (C4D) offers the contactless electrode configuration, and thus is not in contact with the solutions under investigation. This prevents contamination, so it can be easy to use as well as maintain. This study investigated a chip-based CE/CEC with C4D technique, including silicon-based microfluidic device fabrication processes with packaging, design and optimization. It also examined the compatibility of the silicon-based CEC microchip interfaced with C4D. In this paper, the authors demonstrated a nanofabrication technique for a novel microchip electrochromatography (MEC) device, whose capability is to be used as a mobile analytical equipment. This research investigated using samples of potassium ions, sodium ions and aspirin (acetylsalicylic acid).

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