Self-aligned double-gate single-electron transistor derived from 0.12-μm-scale electron-beam lithography

2001 ◽  
Vol 78 (14) ◽  
pp. 2070-2072 ◽  
Author(s):  
K. Nishiguchi ◽  
S. Oda
2000 ◽  
Vol 76 (16) ◽  
pp. 2256-2258 ◽  
Author(s):  
Yu. A. Pashkin ◽  
Y. Nakamura ◽  
J. S. Tsai

2004 ◽  
Vol 85 (17) ◽  
pp. 3893-3895 ◽  
Author(s):  
Shu-Fen Hu ◽  
Chin-Lung Sung ◽  
Kuo-Dong Huang ◽  
Yue-Min Wan

2009 ◽  
Vol 20 (28) ◽  
pp. 285302 ◽  
Author(s):  
F Cheynis ◽  
H Haas ◽  
T Fournier ◽  
L Ranno ◽  
W Wernsdorfer ◽  
...  

2007 ◽  
Vol 121-123 ◽  
pp. 513-516
Author(s):  
S.B. Long ◽  
Zhi Gang Li ◽  
X.W. Zhao ◽  
Bao Qin Chen ◽  
Ming Liu

For compatibility with present CMOS devices, the single-electron transistor (SET) is preferably made in silicon. In this paper, a Si-based SET with in-plane side gates is proposed, which is fabricated in a SIMOX (Separation by IMplanted OXygen) wafer using electron beam lithography (EBL) with high-resolution SAL601 negative e-beam resist and inductively coupled plasma (ICP) etching. Carefully controlled the process, the SET with a 70-nm-radius Coulomb island is successfully fabricated. The Rds-T characteristics of the SET indicate that the device has typical semiconductor characteristics and the co-tunneling phenomena is impossible to occur. The Ids-Vds characteristics of the SET at different values of Vg (-10 V, 0 V, 10 V) measured at the temperature of 2 K all show Coulomb staircases. And the good reproducibility of the Ids-Vds characteristics can also be realized. The corresponding dIds/dVds-Vds characteristics show the clear differential conductance oscillations at 2 K. The Ids-Vg curve at Vds = 0.1 V and Vg = 10 V approximately exhibits Coulomb oscillations. The fabrication process is quite easy and this kind of Si-based SET has the advantages of simplicity, IC-orientation and compatibility with traditional CMOS process.


Sign in / Sign up

Export Citation Format

Share Document