Low-voltage electric-double-layer paper transistors gated by microporous SiO2 processed at room temperature
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2017 ◽
Vol 5
(40)
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pp. 10609-10614
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2011 ◽
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pp. 512-514
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2017 ◽
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pp. 875-878
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2017 ◽
Vol 9
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pp. 5056-5061
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