Microporous SiO2 with huge electric-double-layer capacitance for low-voltage indium tin oxide thin-film transistors

2009 ◽  
Vol 95 (22) ◽  
pp. 222905 ◽  
Author(s):  
Aixia Lu ◽  
Jia Sun ◽  
Jie Jiang ◽  
Qing Wan
RSC Advances ◽  
2019 ◽  
Vol 9 (53) ◽  
pp. 30715-30719 ◽  
Author(s):  
Wei Dou ◽  
Yuanyuan Tan

Ultralow-voltage (0.8 V) thin-film transistors (TFTs) using self-assembled indium-tin-oxide (ITO) as the semiconducting layer and microporous SiO2 immersed in 5% H3PO4 for 30 minutes with huge electric-double-layer (EDL) capacitance as the gate dielectric are fabricated at room temperature.


2016 ◽  
Vol 63 (3) ◽  
pp. 1072-1077 ◽  
Author(s):  
Xin Xu ◽  
Letao Zhang ◽  
Yang Shao ◽  
Zheyuan Chen ◽  
Yong Le ◽  
...  

RSC Advances ◽  
2020 ◽  
Vol 10 (14) ◽  
pp. 8093-8096
Author(s):  
Wei Dou ◽  
Yuanyuan Tan

Dual gate (DG) low-voltage transparent electric-double-layer (EDL) thin-film transistors (TFTs) with microporous-SiO2 for both top and bottom dielectrics have been fabricated, both dielectrics were deposited by plasma-enhanced chemical vapor deposition (PECVD).


2014 ◽  
Vol 35 (4) ◽  
pp. 482-484 ◽  
Author(s):  
Ning Liu ◽  
Yanghui Liu ◽  
Liqiang Zhu ◽  
Yi Shi ◽  
Qing Wan

2019 ◽  
Vol 19 (9) ◽  
pp. 5619-5623
Author(s):  
Y. L Chen ◽  
G. L Liou ◽  
H. H Hsu ◽  
P. C Chen ◽  
Z. W Zheng ◽  
...  

2011 ◽  
Vol 98 (11) ◽  
pp. 113507 ◽  
Author(s):  
Jie Jiang ◽  
Jia Sun ◽  
Wei Dou ◽  
Bin Zhou ◽  
Qing Wan

Sign in / Sign up

Export Citation Format

Share Document