Design of a Compact 2.4 GHz Class-F Power Amplifier with High Power Added Efficiency

2019 ◽  
pp. 1-8 ◽  
Author(s):  
M. Hayati ◽  
S. Zarghami ◽  
A. Grebennikov
Keyword(s):  
Power Amplifier ◽  
High Power ◽  
Power Added Efficiency ◽  
Class F

scholarly journals A High Power-Added-Efficiency 2.5-GHz Class-F Power Amplifier Using 0.5 μm GaN on SiC HEMT Technology

2016 ◽  
Vol 04 (03) ◽  
pp. 74-78
Author(s):  
Chia-Han Lin ◽  
Hsien-Chin Chiu ◽  
Min-Li Chou ◽  
Hsiang-Chun Wang ◽  
Ming-Feng Huang
Keyword(s):  
Power Amplifier ◽  
High Power ◽  
Power Added Efficiency ◽  
Class F

Class-F power amplifier with high power added efficiency for 900MHz

2014 ◽  
Author(s):  
M. Al-Ajmi ◽  
A. Al-Blushi ◽  
R. Al-Mamari ◽  
Z. Nadir ◽  
M. Bait-Suwailam
Keyword(s):  
Power Amplifier ◽  
High Power ◽  
Power Added Efficiency ◽  
Class F

scholarly journals Design of W-Band GaN-on-Silicon Power Amplifier Using Low Impedance Lines

2021 ◽  
Vol 11 (19) ◽  
pp. 9017
Author(s):  
Jinho Jeong ◽  
Yeongmin Jang ◽  
Jongyoun Kim ◽  
Sosu Kim ◽  
Wansik Kim
Keyword(s):  
Power Density ◽  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
Common Source ◽  
High Electron ◽  
Large Signal ◽  
Power Added Efficiency ◽  
W Band ◽  
Gan On Si

In this paper, a high-power amplifier integrated circuit (IC) in gallium-nitride (GaN) on silicon (Si) technology is presented at a W-band (75–110 GHz). In order to mitigate the losses caused by relatively high loss tangent of Si substrate compared to silicon carbide (SiC), low-impedance microstrip lines (20–30 Ω) are adopted in the impedance matching networks. They allow for the impedance transformation between 50 Ω and very low impedances of the wide-gate transistors used for high power generation. Each stage is matched to produce enough power to drive the next stage. A Lange coupler is employed to combine two three-stage common source amplifiers, providing high output power and good input/output return loss. The designed power amplifier IC was fabricated in the commercially available 60 nm GaN-on-Si high electron mobility transistor (HEMT) foundry. From on-wafer probe measurements, it exhibits the output power higher than 26.5 dBm and power added efficiency (PAE) higher than 8.5% from 88 to 93 GHz with a large-signal gain > 10.5 dB. Peak output power is measured to be 28.9 dBm with a PAE of 13.3% and a gain of 9.9 dB at 90 GHz, which corresponds to the power density of 1.94 W/mm. To the best of the authors’ knowledge, this result belongs to the highest output power and power density among the reported power amplifier ICs in GaN-on-Si HEMT technologies operating at the W-band.

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

Circuit World ◽  
2020 ◽  
Vol 46 (4) ◽  
pp. 243-248
Author(s):  
Min Liu ◽  
Panpan Xu ◽  
Jincan Zhang ◽  
Bo Liu ◽  
Liwen Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Common Source ◽  
Power Performance ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Saturated Output Power

Purpose Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications. Design/methodology/approach A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks. Findings By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz. Originality/value The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

Design of a Miniaturized Class F Power Amplifier Using Capacitor Loaded Transmission Lines

Frequenz ◽  
2020 ◽  
Vol 74 (3-4) ◽  
pp. 145-152
Author(s):  
Ali Pirasteh ◽  
Saeed Roshani ◽  
Sobhan Roshani
Keyword(s):  
Power Amplifier ◽  
Mobile Communications ◽  
Transmission Lines ◽  
Low Voltage ◽  
Good Choice ◽  
Band Frequency ◽  
Power Added Efficiency ◽  
Harmonic Control ◽  
Measurement Results ◽  
Class F

AbstractIn this paper, a new method to decrease the dimensions of the microstrip structures and reducing the overall size of the class F amplifiers is presented. First, by using the PHEMT transistor with a conventional harmonic control circuit (HCC), a low-voltage class F amplifier in the L band frequency at the operating frequency of 1.75 GHz is introduced, which named primitive class F power amplifier. Then, this amplifier is optimized by using capacitor loaded transmission lines (CLTLs). The measurement results of the amplifier show that by using the CLTL structure, the overall size has been reduced 85% (0.23 λg × 0.17 λg). The maximum power-added efficiency (PAE) of the power amplifier is about 77.5 % and the power gain which has been reached to 18.33 dB. The desirable features of this power amplifier, along with its very small size, make this power amplifier a good choice to use for the global system for mobile communications.

scholarly journals Extended Bandwidth and Increased Efficiency Quasi-Doherty Power Amplifier Design With A Revised Approach For Load Modulation

2021 ◽  
Author(s):  
Seyedehmarzieh Rouhani ◽  
Kasra Rouhi ◽  
Adib Abrishamifar ◽  
Majid Tayarani
Keyword(s):  
Power Amplifier ◽  
High Power ◽  
Maximum Output Power ◽  
Input Power ◽  
Maximum Efficiency ◽  
Maximum Output ◽  
Power Added Efficiency ◽  
Active Feedback ◽  
Doherty Power Amplifier ◽  
Load Modulation

This paper presents an approach to power added efficiency (PAE) increase for Quasi-Doherty power amplifier (Q-DPA) design. For this aim, active feedback is utilized instead of a passive quarter wavelength transmission line (TL) usage, which is conventionally used in the DPA schematic. PAE increase can be done by applying an accurate load modulation to the main amplifier (PAmain), especially for technologies in which output impedance of the main power amplifier (Zout,main) considerably varies in both low and high power regions. Because such precise modulation is still based on a modified TL, this approach suffers from the inherent narrowband behavior of that TL. As a consequence, expecting a wideband DPA may not be satisfied in all cases. To deal with this issue, active feedback is used to play a role in reaching PAmain, which is not saturated before, to its maximum efficiency at the highest level of received input power (Pin) in the high power region. Following Zout,main trajectories in power and frequency sweeps simultaneously just by a passive TL are not needed anymore. Still, for the sake of preventing total PAE degradation due to the consummated power by the feedback path’s power amplifier (PAfeedback) should be limited, analytical confinement is provided in this work. A comparison is made between GaAs pHEMT 0.25um MMIC technology-based conventional DPA and the proposed revised approach based-DPA to verify the mentioned approach. The proposed PA shows maximum output power of 33.4 dBm, maximum PAE of 41.6, fractional bandwidth of 11%. The Q-DPA works with a maximum power gain of 24.16.

A planner Doherty power amplifier with harmonic suppression with open and short ended stubs

Frequenz ◽  
2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Saeedeh Lotfi ◽  
Saeed Roshani ◽  
Sobhan Roshani ◽  
Maryam Shirzadian Gilan
Keyword(s):  
Power Amplifier ◽  
Power Divider ◽  
Harmonic Suppression ◽  
Power Added Efficiency ◽  
Main Amplifier ◽  
Inverse Topology ◽  
Doherty Power Amplifier ◽  
Amplifier Design ◽  
Doherty Amplifier ◽  
Class F

Abstract This paper presents a new Doherty power amplifier (DPA) with harmonics suppression. A Wilkinson power divider (WPD) with open-ended and short-ended stubs is designed to suppress unwanted signals. To design the power divider in the circuit of the DPA, even and odd mode analyses are utilized. The proposed design operates at range of 1.2–1.6 GHz. The linearity of the suggested DPA is increased about 6 dBm, in comparison with the main amplifier. The designed Doherty amplifier has a power added efficiency (PAE), drain efficiency (DE) and Gain about 60, 61% and 19 dB, respectively. The designed WPD suppresses 2nd up to 14th harmonics with more than 20 dB suppression level, which is useful for suppressing unwanted harmonics in DPA design. ATF-34143 transistors (pHEMT technology) are used for this DPA amplifier design. The main amplifier has class-F topology and class-F inverse topology is used for auxiliary amplifier.

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