A poly-Si thin-film transistor EEPROM cell with a folded floating gate

1999 ◽  
Vol 46 (2) ◽  
pp. 436-438 ◽  
Author(s):  
Sung-Hoi Hur ◽  
Nae-In Lee ◽  
Jin-Woo Lee ◽  
Chul-Hi Han
1999 ◽  
Vol 571 ◽  
Author(s):  
K. Nomoto ◽  
D. P. Gosain ◽  
T. Noguchi ◽  
S. Usui ◽  
Y. Mori

ABSTRACTWe report a novel poly-Si-thin-film-transistor based memory with Si-nano-crystals (Si dots) floating gate fabricated on a quartz substrate at a temperature below 400°C. Novel techniques of Si-dot and tunnel-oxide formation using excimer laser annealing were performed. A preliminary device shows a threshold voltage shift larger than 1 V with 20 V, 10 ms write/erase (W/E) operation and a retention time of 103 s at room temperature. The device operates 104 W/E cycles without significant degradation.


1998 ◽  
Vol 37 (Part 1, No. 3B) ◽  
pp. 1064-1066 ◽  
Author(s):  
Jae-Hong Jeon ◽  
Cheol-Min Park ◽  
Juhn-Suk Yoo ◽  
Cheon-Hong Kim ◽  
Min-Koo Han

2015 ◽  
Vol 36 (8) ◽  
pp. 778-780
Author(s):  
Jae Hyo Park ◽  
Hyung Yoon Kim ◽  
Chang Woo Byun ◽  
Seung Ki Joo

2017 ◽  
Vol 7 (1) ◽  
Author(s):  
Tsung-Ta Wu ◽  
Wen-Hsien Huang ◽  
Chih-Chao Yang ◽  
Hung-Chun Chen ◽  
Tung-Ying Hsieh ◽  
...  

1987 ◽  
Vol 97-98 ◽  
pp. 321-324 ◽  
Author(s):  
M.J. Powell ◽  
C. van Berkel ◽  
I.D. French

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