A 20F2 Area-Efficient Differential nand-Structured Physically Unclonable Function for Low-Cost IoT Security

Author(s):  
Jongmin Lee ◽  
Minsun Kim ◽  
Gicheol Shin ◽  
Yoonmyung Lee
Keyword(s):  
Low Cost ◽  
2019 ◽  
Vol 2 (9) ◽  
pp. 139-142 ◽  
Author(s):  
Jongmin Lee ◽  
Minsun Kim ◽  
Gicheol Shin ◽  
Yoonmyung Lee
Keyword(s):  
Low Cost ◽  

2019 ◽  
Vol 18 (3) ◽  
pp. 1-21 ◽  
Author(s):  
Weiqiang Liu ◽  
Lei Zhang ◽  
Zhengran Zhang ◽  
Chongyan Gu ◽  
Chenghua Wang ◽  
...  
Keyword(s):  
Low Cost ◽  

Author(s):  
Nick Tredennick ◽  
Paul Ying-Fung Wu ◽  
Harry Peterson ◽  
John Peterson
Keyword(s):  
Low Cost ◽  

Electronics ◽  
2019 ◽  
Vol 8 (2) ◽  
pp. 240 ◽  
Author(s):  
Yuanyuan Zhang ◽  
Ning Wu ◽  
Fang Zhou ◽  
Jinbao Zhang ◽  
Muhammad Yahya

Differential power analysis (DPA) is an effective side channel attack method, which poses a critical threat to cryptographic algorithms, especially lightweight ciphers such as SIMON. In this paper, we propose an area-efficient countermeasure against DPA on SIMON based on the power randomization. Firstly, we review and analyze the architecture of SIMON algorithm. Secondly, we prove the threat of DPA attack to SIMON by launching actual DPA attack on SIMON 32/64 circuit. Thirdly, a low-cost power randomization scheme is proposed by combining fault injection with double rate technology, and the corresponding circuit design is implemented. To the best of our knowledge, this is the first scheme that applies the combination of fault injection and double rate technology to the DPA-resistance. Finally, the t-test is used to evaluate the security mechanism of the proposed designs with leakage quantification. Our experimental results show that the proposed design implements DPA-resistance of SIMON algorithm at certain overhead the cost of 47.7% LUTs utilization and 39.6% registers consumption. As compared to threshold implementation and bool mask, the proposed scheme has greater advantages in resource consumption.


Author(s):  
Atrayee Majumder Ray ◽  
Anindita Sarkar ◽  
Ahmed J. Obaid ◽  
Saravanan Pandiaraj

Internet of things (IoT) is one of those emerging technologies, which are going to rule the world in the next few decades. Due to the advancement of low-cost computing systems and mobile technologies, these physical things are now capable of sharing and collecting data with minimal human interference. However, these devices are exposed to various security threats regarding privacy and data confidentiality as they are openly accessible to all in the network. Moreover, many IoT devices have low processing power and weak security level which could be the main targets for hackers. Lightweight cryptographic schemes are used to meet the security needs in IoT environment. Steganography is used as another security tool for IoT devices. This chapter is an attempt to analyze the various steganography techniques used to strengthen the security needs of IoT devices as per their applications. IoT security schemes using different steganography models and algorithms are outlined here with their relative advantages and disadvantages.


Technologies ◽  
2020 ◽  
Vol 8 (4) ◽  
pp. 50
Author(s):  
Anthony Overmars ◽  
Sitalakshmi Venkatraman

Recent growth in the Internet of Things (IoT) looks promising for realizing a smart environment of the future. However, concerns about the security of IoT devices are escalating as they are inherently constrained by limited resources, heterogeneity, and lack of standard security controls or protocols. Due to their inability to support state-of-the-art secure network protocols and defense mechanisms, standard security solutions are unsuitable for dynamic IoT environments that require large and smart IoT infrastructure deployments. At present, the IoT based smart environment deployments predominantly use cloud-centric approaches to enable continuous and on-demand data exchange that leads to further security and privacy risks. While standard security protocols, such as Virtual Private Networks (VPNs), have been explored for certain IoT environments recently, the implementation models reported have several variations and are not practically scalable for any dynamically scalable IoT deployment. This paper addresses current drawbacks in providing the required flexibility, interoperability, scalability, and low-cost practical viability of a secure IoT infrastructure. We propose an adaptive end-to-end security model that supports the defense requirements for a scalable IoT infrastructure. With low-cost embedded controllers, such as the Raspberry Pi, allowing for the convergence of more sophisticated networking protocols to be embedded at the IoT monitoring interface, we propose a scalable IoT security model integrating both the IoT devices and the controller as one embedded device. Our approach is unique, with a focus on the integration of a security protocol at the embedded interface. In addition, we demonstrate a prototype implementation of our IoT security model for a smart water monitoring system. We believe that our modest first step would instill future research interests in this direction.


2014 ◽  
Vol 2014 ◽  
pp. 1-7 ◽  
Author(s):  
Munaza Yousuf ◽  
Arshad Aziz ◽  
Riaz Mahmud

This paper presents an area efficient Field Programmable Gate Array (FPGA) based digital design of a processing module for MTI radar. Signal contaminated with noise and clutter is modelled to test the efficacy of the design algorithms. For flexibility of design and to achieve optimized results, we have combined the high-level utility of MATLAB with the flexibility and optimization on FPGA for this implementation. Two- and three-pulse cancellers are chosen for design due to its simplicity in both concept and implementation. The results obtained are efficient in terms of enhanced throughput per Slice (TPA) of 1.146, that is, occupying fewer area resources on hardware while achieving optimized speed. The outcomes show that this design of MTI radar processor has many advantages, such as high processing precision, strong processing ability, real time, and low cost. All these advantages greatly contribute to the design requirements and make it appropriate for the application of high-speed signal processing.


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