Minimisation of power consumption in digital integrated circuits by reduction of switching activity

1999 ◽  
Author(s):  
I. Brzozowski ◽  
A. Kos
Keyword(s):  
Integrated Circuits ◽  
Power Consumption ◽  
Switching Activity ◽  
Digital Integrated Circuits

Low Power Pulse-Triggered Flip-Flop Based on Clock Triggering Edge Control Technique

2015 ◽  
Vol 24 (07) ◽  
pp. 1550094 ◽  
Author(s):  
Jizhong Shen ◽  
Liang Geng ◽  
Xuexiang Wu
Keyword(s):  
Integrated Circuits ◽  
Power Dissipation ◽  
Energy Efficient ◽  
Clock Cycle ◽  
Control Technique ◽  
Switching Activity ◽  
Digital Integrated Circuits ◽  
Flip Flop ◽  
Deep Impact ◽  
Power Pulse

Flip-flop is an important unit in digital integrated circuits, whose characteristics have a deep impact on the performance of the circuits. To reduce the power dissipation of flip-flops, clock triggering edge control technique is proposed, which is feasible to block one or two triggering edges of a clock cycle if they are redundant in dual-edge pulse-triggered flip-flops (DEPFFs). Based on this technique, redundant pulses can be suppressed when the input stays unchanged, and all the redundant triggerings are eliminated to reduce redundant transitions at the internal nodes of the flip-flop, so the power dissipation can be decreased. Then a novel DEPFF based on clock triggering edge control (DEPFF-CEC) technique is proposed. Based on the SMIC 65-nm technology, the post layout simulation results show that the proposed DEPFF-CEC gains an improvement of 8.03–39.83% in terms of power dissipation when the input switching activity is 10%, as compared with its counterparts. Thus, it is suitable for energy-efficient designs whose input data switching activity is low.

scholarly journals Double Power Supplies and Cross-zero Clocks Lead to Low Noises and High Efficiency in Digital Integrated Circuits

2021 ◽  
Vol 2095 (1) ◽  
pp. 012001
Author(s):  
Tao Wu
Keyword(s):  
Integrated Circuits ◽  
Power Consumption ◽  
Power Supply ◽  
High Efficiency ◽  
Energy System ◽  
Power Supplies ◽  
Level Energy ◽  
Digital Integrated Circuits ◽  
Single Power ◽  
Ground Line

Abstract Double power supplies are widely used in analog integrated circuits for the sake of power export and dynamic ranges. By contrast, single power supply and the ground line are regular in digital integrated circuits so far. In this paper, it is shown that double power supplies with cross-zero clocks help decrease the power consumption and noises in digital integrated circuits. They are firstly explained in frequency domain and then by a three-level energy system.

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