A wide gain-bandwidth CMOS fully-differential folded cascode amplifier

This paper presents a high unity gain bandwidth fully differential folded-cascode operational amplifier using gain-boosted technique. The amplifier is designed in TSMC 0.18μm 1P6M CMOS technology. The unity-gain bandwidth (GBW) and poles of the gain-boosting amplifiers were carefully designed to improve the stability. The implemented design provides a direct current (DC) gain of around 93 dB with a unity gain frequency of 1.8GHz. It exhibits a DC gain larger than 88dB when the output common-mode voltage between 0.6 V and 1.2V. the overall layout size is 96μm×120μm.

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A CMOS single stage fully differential folded cascode amplifier employing gain boosting technique

2011 International Symposium on Integrated Circuits ◽

10.1109/isicir.2011.6131939 ◽

2011 ◽

Cited By ~ 8

Author(s):

S. A. Enche Ab Rahim ◽

I. M. Azmi

Keyword(s):

Single Stage ◽

Fully Differential ◽

Folded Cascode ◽

Boosting Technique ◽

Cascode Amplifier

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A Start-up Assisted Fully Differential Folded Cascode Opamp

Journal of Circuits System and Computers ◽

10.1142/s0218126619501640 ◽

2019 ◽

Vol 28 (10) ◽

pp. 1950164 ◽

Cited By ~ 4

Author(s):

R. Nagulapalli ◽

K. Hayatleh ◽

S. Barker ◽

B. Yassine ◽

S. Zourob ◽

...

Keyword(s):

Monte Carlo ◽

Positive Feedback ◽

Cmos Technology ◽

Gain Bandwidth ◽

Fully Differential ◽

Start Up ◽

Unity Gain ◽

Folded Cascode ◽

Current Selection ◽

Latch Up

This paper explains the hidden positive feedback in a two-stage fully differential amplifier through external feedback resistors and possible DC latch-up during the amplifier start-up. The biasing current selection among the cascade branches has been explained intuitively, with reference to previous literature. To avoid the latch-up problem, irrespective of the transistor bias currents, a novel hysteresis-based start-up circuit is proposed. An 87[Formula: see text]dB, 250[Formula: see text]MHz unity gain bandwidth amplifier has been developed in 65[Formula: see text]nm CMOS Technology and post-layout simulations demonstrate no start-up failures out of 1000 Monte-Carlo (6-Sigma) simulations. The circuit draws 126[Formula: see text][Formula: see text]A from a 1.2[Formula: see text]V supply and occupies the 2184[Formula: see text][Formula: see text]m2 area.

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CMOS Fully Differential Feedforward-Regulated Folded Cascode Amplifier

Technological Innovation for Sustainability - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-19170-1_62 ◽

2011 ◽

pp. 565-572 ◽

Cited By ~ 1

Author(s):

Edinei Santin ◽

Michael Figueiredo ◽

João Goes ◽

Luís B. Oliveira

Keyword(s):

Fully Differential ◽

Folded Cascode ◽

Cascode Amplifier

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A Capacitor-Free Feed-Forward Compensated-Single-Stage Merged Topology Fully-Differential-CMOS Folded Cascode Amplifier

The 3rd International IEEE-NEWCAS Conference, 2005. ◽

10.1109/newcas.2005.1496697 ◽

2005 ◽

Author(s):

S.M.R. Hasan ◽

N. Ula

Keyword(s):

Single Stage ◽

Feed Forward ◽

Fully Differential ◽

Folded Cascode ◽

Cascode Amplifier

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Design of PMOS and NMOS Input Folded Cascode Amplifier using 180nm SCL Technology Node for Low Power Application

International Journal of Innovative Technology and Exploring Engineering - Special Issue ◽

10.35940/ijitee.d1624.029420 ◽

2020 ◽

Vol 9 (4) ◽

pp. 1372-1375

Keyword(s):

Metal Oxide ◽

Low Power ◽

High Speed ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Technology Node ◽

Fully Differential ◽

Op Amp ◽

Folded Cascode ◽

Cascode Amplifier

This paper presents the details design and simulation of the Folded Cascode amplifier using Source-Coupled-Logic (SCL) technology node for both the P-Type Metal Oxide Semiconductor (PMOS) and N-Type Metal Oxide Semiconductor (NMOS) input. The different way to implement the circuit design for a given specification has clearly described including all the design equation has been presented. All the parameter like open loop gain, Unity Gain Bandwidth (UGB) and Phase Margin (PM) are compared for both the NMOS and PMOS input fully differential folded cascode op-amp circuit are discussed and finally we have got after performance analysis that NMOS input fully differential folded cascode op-amp is the best choice for low power high speed application like in pipeline Analog to Digital (ADC). The circuit has been simulated using cadence virtuoso tool in 0.18µm SCL technology node.

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