A mixed LPDDR2 impedance calibration technique exploiting 28nm Fully-Depleted SOI Back-Biasing

2012 ◽  
Author(s):  
Dimitri Soussan ◽  
Alexandre Valentian ◽  
Sylvain Majcherczak ◽  
Marc Belleville
Keyword(s):  
Calibration Technique ◽  
Fully Depleted

Kink-like effect in long n-channel twin-gate fully-depleted SOI MOSFETs

1994 ◽  
Vol 30 (17) ◽  
pp. 1456-1458 ◽  
Author(s):  
D. De Ceuster ◽  
D. Flandre
Keyword(s):  
Fully Depleted

scholarly journals Simulation of FDSOI-ISFET with Tunable Sensitivity by Temperature and Dual-Gate Structure

Electronics ◽  
2021 ◽  
Vol 10 (13) ◽  
pp. 1585
Author(s):  
Hanbin Wang ◽  
Jinshun Bi ◽  
Mengxin Liu ◽  
Tingting Han
Keyword(s):  
Gate Voltage ◽  
Computer Aided Design ◽  
Silicon On Insulator ◽  
Fully Depleted ◽  
Gate Structure ◽  
Different Temperatures ◽  
Dual Gate ◽  
Sensitivity Changes ◽  
Increasing Temperature ◽  
Aided Design

This work investigates the different sensitivities of an ion-sensitive field-effect transistor (ISFET) based on fully depleted silicon-on-insulator (FDSOI). Using computer-aided design (TCAD) tools, the sensitivity of a single-gate FDSOI based ISFET (FDSOI-ISFET) at different temperatures and the effects of the planar dual-gate structure on the sensitivity are determined. It is found that the sensitivity increases linearly with increasing temperature, reaching 890 mV/pH at 75 °C. By using a dual-gate structure and adjusting the control gate voltage, the sensitivity can be reduced from 750 mV/pH at 0 V control gate voltage to 540 mV/pH at 1 V control gate voltage. The above sensitivity changes are produced because the Nernst limit changes with temperature or the electric field generated by different control gate voltages causes changes in the carrier movement. It is proved that a single FDSOI-ISFET can have adjustable sensitivity by adjusting the operating temperature or the control gate voltage of the dual-gate device.

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