Low-power high bandwidth CMOS current conveyor

Author(s):  
J. Popovic ◽  
A. Pavasovic ◽  
D. Vasiljevic
Author(s):  
Fahmi Elsayed ◽  
◽  
Mostafa Rashdan ◽  
Mohammad Salman

This paper presents a fully integrated CMOS Operational Floating Current Conveyor (OFCC) circuit. The proposed circuit is designed for instrumentation amplifier circuits. The CMOS OFCC circuit is designed and simulated using Cadence in TSMC 90 m technology kit. The circuit aims at two different design goals. The first goal is to design a low power consumption circuit (LBW design) while the second is to design a high bandwidth circuit (HBW design). The total power consumption of the LBW design is 1.26 mW with 30 MHz bandwidth while the power consumption of the HBW design is 3 mW with 104.6 MHz bandwidth.


2014 ◽  
Vol 45 (8) ◽  
pp. 1132-1142 ◽  
Author(s):  
Nikhil Raj ◽  
Ashutosh Kumar Singh ◽  
Anil Kumar Gupta

2021 ◽  
pp. 665-674
Author(s):  
Shailendra Bisariya ◽  
Raman Kapoor ◽  
Sanjay Kumar Singh ◽  
Pushkar Praveen
Keyword(s):  

Sign in / Sign up

Export Citation Format

Share Document