Assessment of Overmodulation Strategies for AC Drives Considering Harmonics Content and Switching Losses

Author(s):  
Ahmed Fathy Abouzeid ◽  
Juan Manuel Guerrero ◽  
Aitor Endemano ◽  
Iker Muniategui ◽  
David Ortega ◽  
...  
Keyword(s):  
Author(s):  
A. Ramesh ◽  
O. Chandra Sekhar ◽  
M. Siva Kumar

All industrial drives need a controlled output and it can be achieved by controlling the input supply. In this regard, the inverter circuit plays an important role in the applications of industrial drives. The industrial drives are operated at high rated power and the conventional inverters cannot be applicable for high power demands because of the large dV/dt (rate of change of voltage) and more switching losses. Therefore, multilevel inverters are introduced for high power-medium voltage applications. For all AC drives the MLIs are reliable in operation. This MLI topology also reduces the harmonics and bearings stress of a motor with low dV/dt. In most applications multilevel inverters are used because we can get more number of voltage levels. To increase the number of voltage levels, circuit needs to have more switches. But, we have to optimize the switch count and switching operations. The power level of the inverter is limited due to high currents and stress. In this paper, we proposed a new circuit topology which enables the switches to be active at different voltage levels, causes reduction of the switching losses and also increases the efficiency of the inverter. In this we have presented two configurations for an eleven level MLI for three phase induction motor drive application. In this an individual DC source is connected for each bridge circuit of each phase in one configuration and only one common DC link is used for three phases in another configuration. With this the size, cost and complexity could be decreased. In both the configurations the controlled output of the inverter is connected to the induction motor drive. The circuits are modeled using Matlab/simulink software and corresponding output waveforms are analyzed for both configurations.


Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
V. Padmathilagam ◽  
T.S. Anandhi

The inverters have to be designed to obtain a quality output voltage or a current waveform with a minimum amount of ripple content. In high power and high voltage applications the conventional two level inverters, however, have some limitations in operating at high frequency mainly due to switching losses and constraints of the power device ratings. Series and parallel combination of power switches in order to achieve the power handling voltages and currents. The conventional two level inverters produce THD levels around 60% even under normal operating conditions which are undesirable and cause more losses and other power quality problems too on the AC drives and utilities. Nowadays, multilevel inverters are widely used in power industry. Voltage unbalance problem is one of the major issues in working of multilevel inverter. In this paper, a three phase H-bridge + H-type FCMLI using sinusoidal reference, third harmonic injection reference, 60 degree reference and stepped wave reference are initially developed using SIMULINK and then implemented in real time environment using dSPACE. The five level output voltages of the chosen MLIs obtained using the MATLAB and dSPACE based PWM strategies and the corresponding % THD, V<sub>RMS</sub> (fundamental) , CF and FF are presented and analyzed. It is observed that bipolar COPWM-C provides output with relatively low distortion for sine reference and bipolar COPWM-B strategy is found to perform better since it provides relatively higher fundamental RMS output voltage for 60 degree reference.


Vestnik MEI ◽  
2019 ◽  
Vol 1 (1) ◽  
pp. 79-85
Author(s):  
Aleksey S. Anuchin ◽  
◽  
Marina A. Gulyaeva ◽  
Dmitriy M. Shpak ◽  
Dmitriy I. Alyamkin ◽  
...  

2019 ◽  
Vol 963 ◽  
pp. 797-800 ◽  
Author(s):  
Ajit Kanale ◽  
Ki Jeong Han ◽  
B. Jayant Baliga ◽  
Subhashish Bhattacharya

The high-temperature switching performance of a 1.2kV SiC JBSFET is compared with a 1.2kV SiC MOSFET using a clamped inductive load switching circuit representing typical H-bridge inverters. The switching losses of the SiC MOSFET are also evaluated with a SiC JBS Diode connected antiparallel to it. Measurements are made with different high-side and low-side device options across a range of case temperatures. The JBSFET is observed to display a reduction in peak turn-on current – up to 18.9% at 150°C and a significantly lesser turn-on switching loss – up to 46.6% at 150°C, compared to the SiC MOSFET.


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