Mitigating Drain Source Voltage Oscillation with Low Switching Losses for SiC Power MOSFETs Using FPGA-Controlled Active Gate Driver

The 1.2 kV SiC JFET and BJT devices have been investigated and compared with respect to total losses including the gate driver losses in a DC-DC converter configuration. The buried grid, Normally-on JFET devices with threshold voltage of -50 V and -10V are compared to BJT devices with ideal semiconductor and passivating insulator interface and an interface with surface recombination velocity of 4.5•104 cm/s yielding agreement to the reported experimental current gain values. The conduction losses of both types of devices are independent of the switching frequency while the switching losses are proportional to the switching frequency. The driver losses are proportional to the switching frequency in the JFET case but to a large extent independent of the switching frequency in the BJT case. The passivation of the emitter junction modeled here by surface recombination velocity has a significant impact on conduction losses and gate driver losses in the investigated BJT devices.

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Analytical prediction of switching losses in MOSFETs for variable drain-source voltage and current applications

2013 IEEE 8th Conference on Industrial Electronics and Applications (ICIEA) ◽

10.1109/iciea.2013.6566458 ◽

2013 ◽

Cited By ~ 5

Author(s):

Hamed Raee ◽

Ali Rabiei ◽

Torbjorn Thirnger

Keyword(s):

Analytical Prediction ◽

Switching Losses ◽

Source Voltage

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Simulation and Analysis of Novel Extendable Multilevel Inverter Topology

Journal of Circuits System and Computers ◽

10.1142/s0218126619500890 ◽

2019 ◽

Vol 28 (06) ◽

pp. 1950089 ◽

Cited By ~ 2

Author(s):

V. Thiyagarajan ◽

P. Somasundaram ◽

K. Ramash Kumar

Keyword(s):

Single Phase ◽

Harmonic Distortion ◽

Multilevel Inverter ◽

Voltage Waveform ◽

Dc Voltage ◽

Switching Losses ◽

Comparison Results ◽

Symmetrical Condition ◽

Gate Driver ◽

Inverter Topology

Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.

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Single-Phase Multilevel Inverter with Simpler Basic Unit Cells for Photovoltaic Power Generation

International Journal of Power Electronics and Drive Systems (IJPEDS) ◽

10.11591/ijpeds.v7.i4.pp1233-1239 ◽

2016 ◽

Vol 7 (4) ◽

pp. 1233 ◽

Cited By ~ 1

Author(s):

M. S. Chye ◽

J. A. Soo ◽

Y. C. Tan ◽

M. Aizuddin ◽

S. Lee ◽

...

Keyword(s):

Power Generation ◽

Single Phase ◽

Harmonic Distortion ◽

Multilevel Inverter ◽

Basic Unit ◽

Scanning Method ◽

Power Mosfets ◽

Switching Losses ◽

Ac Power ◽

Unit Cells

This paper presents a single-phase multilevel inverter (MLI) with simpler basic unit cells. The proposed MLI is able to operate in two modes, i.e. charge mode to charge the batteries, and inverter mode to supply AC power to load, and therefore, it is inherently suitable for photovoltaic (PV) power generation applications. The proposed MLI requires lower number of power MOSFETs and gate driver units, which will translate into higher cost saving and better system reliability. The power MOSFETs in the basic unit cells and H-bridge module are switched at near fundamental frequency, i.e. 100 Hz and 50 Hz, respectively, resulting in lower switching losses. For low total harmonic distortion (THD) operation, a deep scanning method is employed to calculate the switching angles of the MLI. The lowest THD obtained is 8.91% at modulation index of 0.82. The performance of the proposed MLI (9-level) has been simulated and evaluated experimentally. The simulation and experimental results are in good agreement and this confirms that the proposed MLI is able to produce an AC output voltage with low THD.

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