Superior Short Circuit Performance of 1.2kV SiC JBSFETs Compared to 1.2kV SiC MOSFETs

2019 ◽  
Vol 963 ◽  
pp. 797-800 ◽  
Author(s):  
Ajit Kanale ◽  
Ki Jeong Han ◽  
B. Jayant Baliga ◽  
Subhashish Bhattacharya

The high-temperature switching performance of a 1.2kV SiC JBSFET is compared with a 1.2kV SiC MOSFET using a clamped inductive load switching circuit representing typical H-bridge inverters. The switching losses of the SiC MOSFET are also evaluated with a SiC JBS Diode connected antiparallel to it. Measurements are made with different high-side and low-side device options across a range of case temperatures. The JBSFET is observed to display a reduction in peak turn-on current – up to 18.9% at 150°C and a significantly lesser turn-on switching loss – up to 46.6% at 150°C, compared to the SiC MOSFET.

2019 ◽  
Vol 963 ◽  
pp. 625-628
Author(s):  
Ajit Kanale ◽  
B. Jayant Baliga ◽  
Ki Jeong Han ◽  
Subhashish Bhattacharya

The high-temperature switching performance of a 1.2kV SiC JBSFET is compared with a 1.2kV SiC MOSFET using a clamped inductive load switching circuit representing typical H-bridge inverters. The switching losses of the SiC MOSFET are also evaluated with a SiC JBS Diode connected antiparallel to it. Measurements are made with different high-side and low-side device options across a range of case temperatures. The JBSFET is observed to display a reduction in peak turn-on current – up to 18.9% at 150°C and a significantly lesser turn-on switching loss – up to 46.6% at 150°C, compared to the SiC MOSFET.


Electronics ◽  
2021 ◽  
Vol 10 (21) ◽  
pp. 2619
Author(s):  
Jongwoon Yoon ◽  
Kwangsoo Kim

In this study, a novel MOS-channel diode embedded in a SiC superjunction MOSFET (MCD SJ-MOSFET) is proposed and analyzed by means of numerical TCAD simulations. Owing to the electric field shielding effect of the P+ body and the P-pillar, the channel diode oxide thickness (tco) of MCD can be set to very thin while achieving a low maximum oxide electric field (EMOX) under 3 MV/cm. Therefore, the turn-on voltage (VF) of the proposed structure was 1.43 V, deactivating the parasitic PIN body diode. Compared with the SJ-MOSFET, the reverse recovery time (trr) and the reverse recovery charge (Qrr) were improved by 43% and 59%, respectively. Although there is a slight increase in specific on-resistance (RON), the MCD SJ-MOSFET shows very low input capacitance (CISS) and gate to drain capacitance (CGD) due to the reduced active gate. Therefore, significantly improved figures of merit RON × CGD by a factor of 4.3 are achieved compared to SJ-MOSFET. As a result, the proposed structure reduced the switching time as well as the switching energy loss (ESW). Moreover, electro-thermal simulation results show that the MCD SJ-MOSFET has a short circuit withstand time (tSC) more than twice that of the SJ-MOSFET at various DC bus voltages (400 and 600 V).


2020 ◽  
Vol 1004 ◽  
pp. 783-788
Author(s):  
Ki Jeong Han ◽  
Ajit Kanale ◽  
B. Jayant Baliga ◽  
Subhashish Bhattacharya

The electrical characteristics of the 1.2-kV rated 4H-SiC accumulation-channel split-gate octagonal cell MOSFET (SG-OCTFET) are experimentally compared with linear, square, hexagonal, octagonal, and compact-octagonal cell topologies. The specific on-resistance of the SG-OCTFET is 52% larger than the conventional linear cell topology. However, the SG-OCTFET has: (i) high-frequency figure-of-merit HFFOM[Ron×Cgd] 9.4×, 6.1×, 2.6×, 2.0×, and 1.8× superior to the square, hex, linear, octagonal, and compact-octagonal cells; (ii) fastest switching performance among all cell topologies, with 26% smaller switching energy loss than the conventional linear cell topology; and (iii) short circuit capability 1.5× longer than the conventional linear cell topology. The SG-OCTFET device is therefore an optimum candidate for high frequency applications of SiC MOSFETs.


2018 ◽  
Vol 924 ◽  
pp. 697-702 ◽  
Author(s):  
Sauvik Chowdhury ◽  
Levi Gant ◽  
Blake Powell ◽  
Kasturirangan Rangaswamy ◽  
Kevin Matocha

This paper presents the performance, reliability and ruggedness characterization of 1200V, 80mΩ rated SiC planar gate MOSFETs, fabricated in a high volume, 150mm silicon CMOS foundry. The devices showed a specific on-resistance of 5.1 mΩ.cm2 at room temperature, increasing to 7.5 mΩ.cm2 at 175 °C. Total switching losses were less than 300μJ (VDD = 800V, ID = 20A). The devices showed excellent gate oxide reliability with VTH shifts under 0.2V for extended HTGB stress testing at 175 °C for up to 5500 hours (VGS = 25V) and 2500 hours (VGS = -10V). Ruggedness performance such as unclamped inductive load switching and short circuit capability are also discussed.


2016 ◽  
Vol 858 ◽  
pp. 885-888 ◽  
Author(s):  
Yuichiro Nanen ◽  
Masatoshi Aketa ◽  
Yuki Nakano ◽  
Hirokazu Asahara ◽  
Takashi Nakamura

Dynamic and static characteristics of SiC power MOSFETs at high temperature up to 380°C were investigated. Investigated devices have exhibited a behavior as a normally-off MOSFET even at such high temperature as 380°C. Temperature dependence of the MOSFET characteristics are reported in this paper, such as threshold voltage (VTH), on-resistance, internal gate resistance, and turn-on and turn-off losses (EON, EOFF). EON decreases and EOFF increases with increased temperature. Temperature dependence of switching losses is affected by transfer time of VDS, which was mainly determined from VTH.


2008 ◽  
Vol 600-603 ◽  
pp. 1067-1070 ◽  
Author(s):  
Rajesh Kumar Malhan ◽  
S.J. Rashid ◽  
Mitsuhiro Kataoka ◽  
Yuuichi Takeuchi ◽  
Naohiro Sugiyama ◽  
...  

Static and dynamic behavior of the epitaxially grown dual gate trench 4H-SiC junction field effect transistor (JFET) is investigated. Typical on-state resistance Ron was 6 – 10mΩcm2 at VGS = 2.5V and the breakdown voltage between the range of 1.5 – 1.8kV was realized at VGS = −5V for normally-off like JFETs. It was found that the turn-on energy delivers the biggest part of the switching losses. The dependence of switching losses from gate resistor is nearly linear, suggesting that changing the gate resistor, a way similar to Si-IGBT technology, can easily control di/dt and dv/dt. Turn-on losses at 200°C are lower compared to those at 25°C, which indicates the influence of the high internal p-type gate layer resistance. Inductive switching numerical analysis suggested the strong influence of channel doping conditions on the turn-on switching performance. The fast switching normally-off JFET devices require heavily doped narrow JFET channel design.


2004 ◽  
Vol 14 (03) ◽  
pp. 879-883 ◽  
Author(s):  
SEI-HYUNG RYU ◽  
SUMI KRISHNASWAMI ◽  
MRINAL DAS ◽  
JAMES RICHMOND ◽  
ANANT ANANT AGARWAL ◽  
...  

Due to the high critical field in 4 H - SiC , the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4 H - SiC device. Therefore, the total drain charge and switching losses are much lower for the 4 H - SiC power device. A 2.3 kV, 13.5 mΩ-cm2 4 H - SiC power DMOSFET with a device area of 2.1 mm × 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4 H - SiC power DMOSFET. This suggests that the 4 H - SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.


2005 ◽  
Vol 483-485 ◽  
pp. 797-800 ◽  
Author(s):  
Sei Hyung Ryu ◽  
Sumi Krishnaswami ◽  
Mrinal K. Das ◽  
Jim Richmond ◽  
Anant K. Agarwal ◽  
...  

Due to the high critical field in 4H-SiC, the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4H-SiC device. Therefore, the total drain charge and switching losses are much lower for the 4H-SiC power device. A 2.3 kV, 13.5 mW-cm2 4H-SiC power DMOSFET with a device area of 2.1 mm x 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4H-SiC power DMOSFET. This suggests that the 4H-SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.


2021 ◽  
Vol 300 ◽  
pp. 01012
Author(s):  
Xuebing Zhai ◽  
Tong Yang ◽  
Ruliang Zhang ◽  
Jiang Du

Low on-state voltage and low turn-off loss are key issues for IGBT used in HVDC and FACTS. Partial narrow mesa was introduced to improve emitter side contact resistance of IGBT based on Nakagawa limit assumption. However, turn-off loss increases and short circuit sustainability get worse. Split gate separates gate electrode from drift region and reduces gate-collector capacitance to lower turn-off energy loss. Combination partial narrow mesa with split gate can get better gate performance and turn-off characteristics in 4.5kV IGBT. Simulated results with TCAD show proposed models improves switching loss and gate reliability. By adjusting split gap electric filed, split gate shape has an important effect on turn-on characteristics.


2020 ◽  
Vol 1004 ◽  
pp. 789-794
Author(s):  
Aditi Agarwal ◽  
Ajit Kanale ◽  
Ki Jeong Han ◽  
B. Jayant Baliga ◽  
Subhashish Bhattacharya

This paper compares the static and dynamic performance of 1.2 kV 4H-SiC ACCUFETs and INVFETs with identical channel length (0.5 μm) and gate oxide thickness (55 nm). It is demonstrated for the first time that ACCUFETs have lower total switching losses in comparison to the INVFETs. ACCUFETs are therefore superior devices for applications due to their lower specific on-resistance and overall switching losses. However, short circuit tests conducted on the devices show that ACCUFETs have a smaller short-circuit time (tSC) in comparison the INVFETs due to their higher short-circuit current.


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