No-clean polymer flux evaluations and its impact on BGA solder joint quality and board level reliability

Author(s):  
Lee Choon Mei Serene ◽  
Carlo Marbella ◽  
Tan Ai Min
2019 ◽  
Vol 44 (1) ◽  
pp. 975-983 ◽  
Author(s):  
Kyoungmoo Harr ◽  
Chang-Bae Lee ◽  
Yoon-Su Kim ◽  
Seungwook Park ◽  
Jin-Gu Kim ◽  
...  

2004 ◽  
Vol 1 (2) ◽  
pp. 64-71 ◽  
Author(s):  
Xiaowu Zhang ◽  
E. H. Wong ◽  
Mahadevan K. Iyer

This paper presents a nonlinear finite element analysis on board level solder joint reliability enhancement of a double-bump wafer level chip scale package (CSP). A viscoplastic constitutive relation is adopted for the solders to account for its time and temperature dependence in thermal cycling. The fatigue life of solder joint is estimated by the modified Coffin-Manson equation, which has been verified by experimental results using one of the double-bump wafer level CSP packages as the test vehicle. A series of parametric studies were performed by changing the Sn/Ag inner bump size (UBM pad size and standoff height), the eutectic Sn/Pb external solder joint size (pad size and standoff height), pitch, die thickness, and the encapsulant thickness. The results obtained from the modeling are useful to form design guidelines for board level reliability enhancement of the wafer level CSP packages.


2010 ◽  
Vol 132 (2) ◽  
Author(s):  
Jin Yang ◽  
Lizheng Zhang ◽  
I. Charles Ume ◽  
Camil Ghiu ◽  
George White

Microelectronics packaging technology has evolved from through-hole, and bulk configuration to surface-mount, and small-profile ones. Today’s electronics industry is also transiting from SnPb to Pb-free to meet environmental requirements. Land grid array (LGA) package has been becoming popular in portable electronics in terms of low profile on the printed wiring boards and direct Pb-free assembly process compatibility. With the package profile shrinking and operating power increasing, solder joint quality and reliability has become a major concern in microelectronics manufacturing. The solder joint failure at the package level or board level will cause electronic devices not to function during service. In this paper, board-level solder joint reliability of the LGA packages under thermal loading is studied through thermal cycling tests. A novel laser ultrasound-interferometric system developed by the authors is applied to inspect solder joint quality during the thermal cycling tests. While the laser ultrasound inspection technique has been successfully applied to flip chips and chip scale packages, this study is the first application of this technique to overmolded packages. In this study, it is found out that the LGA packages can withstand 1000 temperature cycles without showing crack initiation or other failure mechanisms in the solder joints. The laser ultrasound inspection results match the visual observation and X-ray inspection results. This study demonstrates the feasibility of this system to solder joint quality inspection of overmolded packages. In particular, the devices constituting the objective of this study are radio frequency modules, which are encapsulated through overmolding and are mounted on a typical four-layer FR4 board through LGA terminations.


Author(s):  
Nishant Lakhera ◽  
Burt Carpenter ◽  
Trung Duong ◽  
Mollie Benson ◽  
Andrew J Mawer

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