A Design of High Power SP7T and SP8T RF Switches using SOI CMOS Technology

Author(s):  
David Kim ◽  
Kang Yoon Lee
Author(s):  
Adilson S. Cardoso ◽  
Partha S. Chakraborty ◽  
Anup P. Omprakash ◽  
Nedeljko Karaulac ◽  
Prabir Saha ◽  
...  

Micromachines ◽  
2021 ◽  
Vol 12 (7) ◽  
pp. 737
Author(s):  
An-Chen Liu ◽  
Po-Tsung Tu ◽  
Catherine Langpoklakpam ◽  
Yu-Wen Huang ◽  
Ya-Ting Chang ◽  
...  

GaN has been widely used to develop devices for high-power and high-frequency applications owing to its higher breakdown voltage and high electron saturation velocity. The GaN HEMT radio frequency (RF) power amplifier is the first commercialized product which is fabricated using the conventional Au-based III–V device manufacturing process. In recent years, owing to the increased applications in power electronics, and expanded applications in RF and millimeter-wave (mmW) power amplifiers for 5G mobile communications, the development of high-volume production techniques derived from CMOS technology for GaN electronic devices has become highly demanded. In this article, we will review the history and principles of each unit process for conventional HEMT technology with Au-based metallization schemes, including epitaxy, ohmic contact, and Schottky metal gate technology. The evolution and status of CMOS-compatible Au-less process technology will then be described and discussed. In particular, novel process techniques such as regrown ohmic layers and metal–insulator–semiconductor (MIS) gates are illustrated. New enhancement-mode device technology based on the p-GaN gate is also reviewed. The vertical GaN device is a new direction of development for devices used in high-power applications, and we will also highlight the key features of such kind of device technology.


Author(s):  
John Bulzacchelli ◽  
Troy Beukema ◽  
Daniel Storaska ◽  
Ping-Hsuan Hsieh ◽  
Sergey Rylov ◽  
...  

2014 ◽  
Vol 23 (3) ◽  
pp. 636-650 ◽  
Author(s):  
Radhika Marathe ◽  
Bichoy Bahr ◽  
Wentao Wang ◽  
Zohaib Mahmood ◽  
Luca Daniel ◽  
...  
Keyword(s):  

Author(s):  
Florent Torres ◽  
Eric Kerhervé ◽  
Andreia Cathelin ◽  
Magali De Matos

Abstract This paper presents a 31 GHz integrated power amplifier (PA) in 28 nm Fully Depleted Silicon-On-Insulator Complementary Metal Oxide Semiconductor (FD-SOI CMOS) technology and targeting SoC implementation for 5 G applications. Fine-grain wide range power control with more than 10 dB tuning range is enabled by body biasing feature while the design improves voltage standing wave ratio (VSWR) robustness, stability and reverse isolation by using optimized 90° hybrid couplers and capacitive neutralization on both stages. Maximum power gain of 32.6 dB, PAEmax of 25.5% and Psat of 17.9 dBm are measured while robustness to industrial temperature range and process spread is demonstrated. Temperature-induced performance variation compensation, as well as amplitude-to-phase modulation (AM-PM) optimization regarding output power back-off, are achieved through body-bias node. This PA exhibits an International Technology Roadmap for Semiconductors figure of merit (ITRS FOM) of 26 925, the highest reported around 30 GHz to authors' knowledge.


Author(s):  
Haidong Sun ◽  
Sho Hoshino ◽  
Hirokazu Yoshizawa ◽  
Fumiyasu Utsunomiya ◽  
Minoru Sudo
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