16.2 A 76fsrms Jitter and –40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization

Author(s):  
Juyeop Kim ◽  
Heein Yoon ◽  
Younghyun Lim ◽  
Yongsun Lee ◽  
Yoonseo Cho ◽  
...  
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