Analysis and design of amplitude error detector and digital control loop to increase reliability of PLL

Author(s):  
Nina Parkalian ◽  
Markus Robens ◽  
Christian Grewing ◽  
Stefan van Waasen
Energies ◽  
2019 ◽  
Vol 12 (14) ◽  
pp. 2738
Author(s):  
Enric Vidal-Idiarte ◽  
Carlos Restrepo ◽  
Abdelali El Aroudi ◽  
Javier Calvente ◽  
Roberto Giral

This paper presents the analysis and design of a PWM nonlinear digital control of a buck converter based on input-output linearization. The control employs a discrete-time bilinear model of the power converter for continuous conduction mode operation (CCM) to create an internal current control loop wherein the inductor current error with respect to its reference decreases to zero in geometric progression. This internal loop is as a constant frequency discrete-time sliding mode control loop with a parameter that allows adjusting how fast the error is driven to zero. Subsequently, an outer voltage loop designed by linear techniques provides the reference of the inner current loop to regulate the converter output voltage. The two-loop control offers a fast transient response and a high regulation degree of the output voltage in front of reference changes and disturbances in the input voltage and output load. The experimental results are in good agreement with both theoretical predictions and PSIM simulations.


2008 ◽  
Vol 17 (03) ◽  
pp. 525-537
Author(s):  
MINGZHI HE ◽  
JIANPING XU

Time delay introduced by sampling and calculation exists between the perturbation and the duty ratio updating in the digital control loop. This time delay degrades the transient performance of digital control switching power supplies. By overcoming the sampling and calculation time effect and to calibrate the ripple that occurs during switching cycles, new control algorithm is proposed in this paper to improve the transient performance of switching power supplies by eliminating the time delay in the control loop. Simulation results show the improvement of load transient performance by the proposed algorithms. Experimental system is also set up to verify the analysis and computer simulation results.


2012 ◽  
Vol 47 (7) ◽  
pp. 1546-1556 ◽  
Author(s):  
Sébastien Cliquennois ◽  
Achille Donida ◽  
Piero Malcovati ◽  
Andrea Baschirotto ◽  
Angelo Nagari

2016 ◽  
Vol 14 ◽  
pp. 85-90 ◽  
Author(s):  
Samuel Quenzer-Hohmuth ◽  
Thoralf Rosahl ◽  
Steffen Ritzmann ◽  
Bernhard Wicht

Abstract. Switched-mode power supplies (SMPS) convert an input DC-voltage into a higher or lower output voltage. In automotive, analog control is mostly used in order to keep the required output voltages constant and resistant to disturbances. The design of robust analog control for SMPS faces parameter variations of integrated and external passive components. Using digital control, parameter variations can be eliminated and the required area for the integrated circuit can be reduced at the same time. Digital control design bears challenges like the prevention of limit cycle oscillations and controller-wind-up. This paper reviews how to prevent these effects. Digital control loops introduce new sources for dead times in the control loop, for example the latency of the analog-to-digital-converter (ADC). Dead times have negative influence on the stability of the control loop, because they lead to phase delays. Consequently, low latency is one of the key requirements for analog-to-digital-converters in digitally controlled SMPS. Exploiting the example of a 500 kHz-buck converter with a crossover frequency of 70 kHz, this paper shows that the 5 µs-latency of a ΔΣ-analog-to-digital-converter leads to a reduction in phase margin of 126°. The latency is less critical for boost converters because of their inherent lower crossover frequencies. Finally, the paper shows a comparison between analog and digital control of SMPS with regard to chip area and test costs.


Sign in / Sign up

Export Citation Format

Share Document