A 0.18-ns Response Time Digital LDO Regulator with Adaptive PI Controller in 180-nm CMOS

Digital low drop-out regulator (D-LDO) with fast settling time and superior transient response is gaining increasing attention to make up for the deficiency of analog LDO. However, as the traditional digital LDOs regulate the output voltage code at a rate of 1 bit per clock cycle, the transient response speed is limited. In this paper, a multi-bit conversion technique is proposed to improve the transient response speed. The multi-bit conversion technique is achieved by an error detector with adaptive regulation of proportion and integration parameters in the digital controller before pass devices. Besides, a voltage sensor and a time-to-digital converter are employed to convert the output voltage to digital codes. Implemented in a 180-nm CMOS process, the proposed D-LDO features under 36/33 mV of undershoot/overshoot at VOUT = 0.95 V as the load current steps up with 40 mA/1 ns on a 0.5 nF load capacitor. The simulated response time is 0.18-ns, the figure-of-merit of speed FOM1 is 0.65 ps and FOM2 achieves 0.068 pF.

Low-complexity sparse-aware multiuser detection for large-scale MIMO systems

Sparse-aware (SA) detectors have attracted a lot attention due to its significant performance and low-complexity, in particular for large-scale multiple-input multiple-output (MIMO) systems. Similar to the conventional multiuser detectors, the nonlinear or compressive sensing based SA detectors provide the better performance but are not appropriate for the overdetermined multiuser MIMO systems in sense of power and time consumption. The linear SA detector provides a more elegant tradeoff between performance and complexity compared to the nonlinear ones. However, the major limitation of the linear SA detector is that, as the zero-forcing or minimum mean square error detector, it was derived by relaxing the finite-alphabet constraints, and therefore its performance is still sub-optimal. In this paper, we propose a novel SA detector, named single-dimensional search-based SA (SDSB-SA) detector, for overdetermined uplink MIMO systems. The proposed SDSB-SA detector adheres to the finite-alphabet constraints so that it outperforms the conventional linear SA detector, in particular, in high SNR regime. Meanwhile, the proposed detector follows a single-dimensional search manner, so it has a very low computational complexity which is feasible for light-ware Internet of Thing devices for ultra-reliable low-latency communication. Numerical results show that the the proposed SDSB-SA detector provides a relatively better tradeoff between the performance and complexity compared with several existing detectors.

Genre-specific Error Detection with Multimodal Feedback

A purpose-built online error detection tool was developed to provide genre-specific corpus-based feedback on errors occurring in draft research articles and graduation theses. The primary envisaged users were computer science majors studying at a public university in Japan. This article discusses the development and evaluation of this interactive, multimodal tool. An in-house learner corpus of graduation theses was annotated for errors that affect the accuracy, brevity, clarity, objectivity and formality of scientific research writing. Software was developed to identify the errors discovered and provide learners with actionable advice and multimodal explanations in both English and Japanese. Qualitative evaluation received in usability studies and focus groups from both teachers and students was extremely positive. Preliminary quantitative evaluation of the effectiveness of the error detector was conducted. Through this pedagogic tool, learners can receive immediate actionable feedback on potential errors, and their teachers no longer feel obliged to check for common genre-specific errors.