Fatigue Performance of Aged SAC-Bi Solder Joint under Varying Stress Cycling

Author(s):  
Minghong Jian ◽  
Palash Pranav Vyas ◽  
Xin Wei ◽  
Mohamed El Amine Belhadi ◽  
Sa'd Hamasha ◽  
...  
2020 ◽  
Vol 143 (1) ◽  
Author(s):  
Minghong Jian ◽  
Sinan Su ◽  
Sa'd Hamasha ◽  
Mohammad M. Hamasha ◽  
Atif Alkhazali

Abstract The reliability of solder joints plays a critical role in electronic assemblies. SnAgCu solder alloys with doped elements such as Bi and Sb is one of the candidates for high reliability applications. However, the mechanical and fatigue properties of the actual solder joint structure have not been studied for these new alloys. In this paper, a cyclic fatigue test was conducted on individual real solder joints of different alloys, including SnAgCu, SnCu–Bi, SnAgCu–Bi, and SnAgCu–BiSb. The fatigue property of those solder joints was analyzed based on the characteristic fatigue life and stress–strain, hysteresis, loops. The results show that solder joints with both Ag and Bi content have a better fatigue resistance than the solder joints with Ag or Bi content only. The results of SnAgCu and SnCu–Bi solder alloys show similar fatigue performance. Also, the fatigue performance of SnAgCu–Bi is close to SnAgCu–BiSb in the accelerated test. But the SnAgCu–Bi alloy is estimated to have a longer characteristic life under low-stress amplitude cycling. The microstructure analysis shows a bismuth-rich phase formed around the Ag3Sn precipitates. Adding bismuth in the solder alloy can significantly improve the fatigue properties through solid solution hardenings. On another hand, the plastic strain range and work dissipation were measured from the hysteresis loops for all tests. The Morrow Energy and the Coffin–Manson models were developed from the fitted data to predict the fatigue life as a function of work dissipation and plastic strain range.


1999 ◽  
Vol 11 (1) ◽  
pp. 117-135
Author(s):  
P. Dineva ◽  
D. Gross ◽  
T. Rangelov

2010 ◽  
Vol 48 (11) ◽  
pp. 1035-1040 ◽  
Author(s):  
Young-Chul Lee ◽  
Kwang-Seok Kim ◽  
Ji-Hyuk Ahn ◽  
Jeong-Won Yoon ◽  
Min-Kwan Ko ◽  
...  

Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.


Author(s):  
Bob Wettermann

Abstract As the pitch and package sizes of semiconductor devices have shrunk and their complexity has increased, the manual methods by which the packages can be re-bumped or reballed for failure analysis have not kept up with this miniaturization. There are some changes in the types of reballing preforms used in these manual methods along with solder excavation techniques required for packages with pitches as fine as 0.3mm. This paper will describe the shortcomings of the previous methods, explain the newer methods and materials and demonstrate their robustness through yield, mechanical solder joint strength and x-ray analysis.


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