Monolithic Si-Based AlGaN/GaN MIS-HEMTs Comparator and Its High Temperature Characteristics

Monolithic GaN High Electron Mobility Transistor (HEMT)-integrated circuits are a promising application of wide band-gap materials. To date, most GaN-based devices behave as NMOS-like transistors. As only NMOS GaN HEMT is currently commercially available, its control circuit requires special design if monolithic integration is desired. This article analyzes the schematics of a GaN-based comparator, and three comparator structures are compared through ADS simulation. The optimal structure with the bootstrapped technique is fabricated based on AlGaN/GaN Metal–Insulator–Semiconductor (MIS) HEMT with the recessed gate method. The comparator has excellent static characteristics when the reference voltage increases from 3 V to 8 V. Dynamic waveforms from 10 kHz to 1 MHz are also obtained. High-temperature tests from 25 °C to 250 °C are applied upon both DC and AC characteristics. The mechanisms of instability issues are explained under dynamic working condition. The results prove that the comparator can be used in the state-of-art mixed-signal circuits, demonstrating the potential for the monolithic all-GaN integrated circuits.

Brain-Inspired Hardware Solutions for Inference in Bayesian Networks

The implementation of inference (i.e., computing posterior probabilities) in Bayesian networks using a conventional computing paradigm turns out to be inefficient in terms of energy, time, and space, due to the substantial resources required by floating-point operations. A departure from conventional computing systems to make use of the high parallelism of Bayesian inference has attracted recent attention, particularly in the hardware implementation of Bayesian networks. These efforts lead to several implementations ranging from digital circuits, mixed-signal circuits, to analog circuits by leveraging new emerging nonvolatile devices. Several stochastic computing architectures using Bayesian stochastic variables have been proposed, from FPGA-like architectures to brain-inspired architectures such as crossbar arrays. This comprehensive review paper discusses different hardware implementations of Bayesian networks considering different devices, circuits, and architectures, as well as a more futuristic overview to solve existing hardware implementation problems.