Low Power High Speed Switched Current Comparator

Author(s):  
Y. Sun ◽  
Y. Swang ◽  
F.C. Lai
2008 ◽  
Vol 44 (3) ◽  
pp. 171 ◽  
Author(s):  
D. Banks ◽  
C. Toumazou

Author(s):  
Soheil Ziabakhsh ◽  
Hosein Alavi Rad ◽  
Alireza Saberkari ◽  
Shahriar Baradaran Shokouhi

2011 ◽  
Vol 20 (01) ◽  
pp. 15-27 ◽  
Author(s):  
XIAN TANG ◽  
KONG PANG PUN

A novel switched-current successive approximation ADC is presented in this paper with high speed and low power consumption. The proposed ADC contains a new high-accuracy and power-efficient switched-current S/H circuit and a speed-improved current comparator. Designed and simulated in a 0.18-μm CMOS process, this 8-bit ADC achieves 46.23 dB SNDR at 1.23 MS/s consuming 73.19 μW under 1.2 V voltage supply, resulting in an ENOB of 7.38-bit and an FOM of 0.357 pJ/Conv.-step.


Author(s):  
Md Torikul Islam Badal ◽  
Mujahidun Bin Mashuri ◽  
Mamun Bin Ibne Reaz ◽  
Noorfazila Kamal ◽  
Fazida Hanim Hashim

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