scholarly journals ASIC wafer test system for the ATLAS Semiconductor Tracker front-end chip

Author(s):  
F. Anghinolfi ◽  
W. Bialas ◽  
N. Busek ◽  
A. Ciocio ◽  
D. Cosgrove ◽  
...  
Keyword(s):  
2002 ◽  
Vol 49 (3) ◽  
pp. 1080-1085 ◽  
Author(s):  
F. Anghinolfi ◽  
W. Bialas ◽  
N. Busek ◽  
A. Ciocio ◽  
D. Cosgrove ◽  
...  
Keyword(s):  

2007 ◽  
Vol 16 (07n08) ◽  
pp. 2496-2502 ◽  
Author(s):  
J. SCHAMBACH ◽  
G. HOFFMANN ◽  
K. KAJIMOTO ◽  
L. BRIDGES ◽  
G. EPPLEY ◽  
...  

The new Time-of-Flight (TOF) subsystem for STAR at RHIC will have 3840 6-pad Multigap Resistive Plate Chambers (MRPC) distributed over 120 trays. Each tray contains 192 channels and three types of electronics cards: “TINO”, “TDIG” and “TCPU”. Every 30 trays send data to a “THUB” card that interfaces to STAR trigger and transmits data over fiber to a STAR DAQ fiber receiver. TINO contains analog front end electronics based on the CERN/LAA NINO custom IC. TDIG digitizes the data using the CERN HPTDC ASIC. TCPU formats and buffers the digital information. A cosmic ray test system comprised of three plastic scintillators, 4 MRPC modules, and TOF prototype electronics is used to determine the timing resolution to be achieved for the entire TOF system. Overall timing resolution of 80 – 110 ps has been achieved.


Author(s):  
Iveta Antonova ◽  
Sergio Ceravolo ◽  
Giovanni Corradi ◽  
Georgi Georgiev ◽  
Venelin Kozhuharov ◽  
...  

Author(s):  
Gary Lewis ◽  
Roger Sweeney ◽  
Phil Lorch ◽  
Roger McAleenan ◽  
Gary Hewitt ◽  
...  

2003 ◽  
Vol 1 ◽  
pp. 155-160 ◽  
Author(s):  
D. Lupea ◽  
U. Pursche ◽  
H.-J. Jentschel

Abstract. In this paper, the Spectral Signature Analysis is presented as a concept for an integrable self-test system (Built-In Self-Test – BIST) for RF front-ends is presented. It is based on modelling the whole RF front-end (transmitter and receiver) on system level, on generating of a Spectral Signature and of evaluating of the Signature Response. Because of using multi-carrier signal as the test signature, the concept is especially useful for tests of linearity and frequency response of front-ends. Due to the presented method of signature response evaluation, this concept can be used for Built-In Self-Correction (BISC) at critical building blocks.


Electronics ◽  
2018 ◽  
Vol 7 (9) ◽  
pp. 208
Author(s):  
Yue Bian ◽  
Yifan Gu ◽  
Xu Ding ◽  
Zhiyu Wang ◽  
Jiongjiong Mo ◽  
...  

Nowadays, more and more MMICs (Microwave Monolithic Integrated Circuit), such as limiters and switches, are designed to have balanced and unbalanced test pad structures to solve the challenging size restrictions and integration requirements for MMICs. Hybrid balanced and unbalanced RF (Radio Frequency) probes are adopted for an on-wafer test of the heteromorphy structures. The thru standard based on single balanced or unbalanced structures cannot meet the impedance matching requirements of the hybrid RF probes at the same time, which leads to a dramatic decreasing of the calibration accuracy and cannot satisfy the requirement of MMIC test. Therefore, in this paper, the calibration error estimating of hybrid RF probes based on traditional SOLR (Short Open Load Reciprocal) calibration method is performed, and an on-wafer test approach of MMIC based on hybrid balanced and unbalanced RF probes is proposed which combines the OSL (Open Short Load) second-order de-embedding technique with vector error correction and the matrix transformation technique. The calibration reference plane can be accurately shifted to the probe tip with this method, which greatly improves the test accuracy, and an automatic test system is built for this method based on the object-oriented C# language.


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