wafer test
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Author(s):  
Ken Chau-Cheung Cheng ◽  
Leon Li-Yang Chen ◽  
Ji-Wei Li ◽  
Katherine Shu-Min Li ◽  
Nova Cheng-Yen Tsai ◽  
...  

Author(s):  
Dyi-Chung Hu ◽  
Hirohito Hashimoto ◽  
Li-Fong Tseng ◽  
Ken Chau-Cheung Cheng ◽  
Katherine Shu-Min Li ◽  
...  

2020 ◽  
Vol 199 (3-4) ◽  
pp. 771-779
Author(s):  
S. Azzoni ◽  
A. J. May ◽  
S. T. Chase ◽  
G. Coppi ◽  
L. C. Kenny ◽  
...  

2019 ◽  
Vol 2019 (HiTen) ◽  
pp. 000122-000125
Author(s):  
Michael Meister ◽  
Marco Reinhard

Abstract Applications in harsh environment such as high temperatures require electronic devices for signal amplification, calculations and digital interfaces. These devices often contain ASICs (application specific integrated circuits) which are suitable for high temperatures above 125 °C. For functionality verification of these high-temperature ASICs a high-temperature wafer test environment is necessary. This article describes a high-temperature wafer test setup which can be used up to 300 °C. It is based on a modular concept for a maximum of 48 test channels. The combination of three modular components (contact needle system, thermal insulation chamber and active probe card) allows adapting the setup to different ASICs and pad layouts. The active probe card operates at temperatures below 65 °C during 300 °C wafer test temperature. It is mounted on the thermal insulation chamber for signal amplification, defined loads or generation of precise input signals. This modular concept significantly shortens the development time for the high-temperature wafer test and thus saves time and reduce the costs of ASIC development.


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