scholarly journals Solution-processed organic devices developed by a novel cost-effective patterning technique based on electrical erosion

Author(s):  
J. Jimenez-Trillo ◽  
A. L. Alvarez ◽  
C. Coya
Author(s):  
David Payno Zarceño ◽  
Samrana Kazim ◽  
Shahzada Ahmad

Thin-film solar cells constituted of abundant elements are the key to ensure mass production, reduce energy costs and meet energy demands. Kesterite, is a cost-effective light absorber, however showed low...


2020 ◽  
Vol 8 (17) ◽  
pp. 2000501 ◽  
Author(s):  
Sanghyun Jeon ◽  
Sang Yeop Lee ◽  
Su‐Kyung Kim ◽  
Woosik Kim ◽  
Taesung Park ◽  
...  

2015 ◽  
Vol 73 (12) ◽  
pp. 1232-1244
Author(s):  
Hironobu Hayashi ◽  
Mitsuharu Suzuki ◽  
Daiki Kuzuhara ◽  
Naoki Aratani ◽  
Hiroko Yamada

2013 ◽  
Vol 44 (1) ◽  
pp. 593-596 ◽  
Author(s):  
Mathew Mathai ◽  
Venkataramanan Seshadri ◽  
Neetu Chopra ◽  
Eli Scott ◽  
Christopher Brown ◽  
...  

2015 ◽  
Vol 3 (45) ◽  
pp. 22996-23002 ◽  
Author(s):  
Jing Bai ◽  
Yunpo Li ◽  
Rui Wang ◽  
Ke Huang ◽  
Qingyi Zeng ◽  
...  

A 3D ZnO/Cu2O nanowire photocathode that largely improves photoelectrocatalytic performance was synthesized using a simple, cost-effective solution processed growth method.


2014 ◽  
Vol 1628 ◽  
Author(s):  
Petri S. Heljo ◽  
Himadri S. Majumdar ◽  
Donald Lupo

ABSTRACTWe report a low cost and high throughput electrochemical anodic oxidation method to enhance the metal-semiconductor contact between a silver electrode and an organic semiconductor in a rectifying diode application. The oxidized layer enhances the contact properties, leading to better device performance. Three different anodic oxide thicknesses were used in the study. Current-voltage and AC rectification measurements were used to characterize the printed devices. The DC output voltage of the half-wave rectifier increased consistently as a function of the oxide thickness. This procedure points toward a cost-effective way to optimize printed organic devices.


Micromachines ◽  
2021 ◽  
Vol 12 (7) ◽  
pp. 741
Author(s):  
Gilsang Yoon ◽  
Donghoon Kim ◽  
Iksoo Park ◽  
Bo Jin ◽  
Jeong-Soo Lee

We present the fabrication and electrical characteristics of nanonet-channel (NET) low-temperature polysilicon channel (LTPS) thin-film transistors (TFTs) using a nanosphere-assisted patterning (NAP) technique. The NAP technique is introduced to form a nanonet-channel instead of the electron beam lithography (EBL) or conventional photolithography method. The size and space of the holes in the nanonet structure are well controlled by oxygen plasma treatment and a metal lift-off process. The nanonet-channel TFTs show improved electrical characteristics in terms of the ION/IOFF, threshold voltage, and subthreshold swing compared with conventional planar devices. The nanonet-channel devices also show a high immunity to hot-carrier injection and a lower variation of electrical characteristics. The standard deviation of VTH (σVTH) is reduced by 33% for a nanonet-channel device with a gate length of 3 μm, which is mainly attributed to the reduction of the grain boundary traps and enhanced gate controllability. These results suggest that the cost-effective NAP technique is promising for manufacturing high-performance nanonet-channel LTPS TFTs with lower electrical variations.


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