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Dielectric hard mask etching with ArF photo resist
Semiconductor Manufacturing Technology Workshop, 2002
◽
10.1109/smtw.2002.1197415
◽
2004
◽
Author(s):
Leonard Hsu
Keyword(s):
Hard Mask
◽
Mask Etching
Download Full-text
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A thick CESL stressed ultra-small (Lg=40nm) SiGe-channel MOSFET fabricated with 193nm scanner lithography and TEOS hard mask etching
10.1117/12.708935
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2007
◽
Author(s):
Wen-Shiang Liao
◽
Tung-Hung Chen
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Hsin-Hung Lin
◽
Wen-Tung Chang
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Tommy Shih
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...
Keyword(s):
Hard Mask
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Mask Etching
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The Role of Oxygen on Anisotropy in Chromium Oxide Hard Mask Etching for Sub-Micron Fabrication
IEEE Transactions on Nanotechnology
◽
10.1109/tnano.2020.3038737
◽
2021
◽
Vol 20
◽
pp. 33-38
Author(s):
Huseyin Ekinci
◽
Navid M.S. Jahed
◽
Mohammad Soltani
◽
Bo Cui
Keyword(s):
Chromium Oxide
◽
Hard Mask
◽
Mask Etching
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A 20 nm physical gate length NMOSFET with a 1.2 nm gate oxide fabricated by mixed dry and wet hard mask etching
Solid-State Electronics
◽
10.1016/s0038-1101(01)00107-1
◽
2002
◽
Vol 46
(3)
◽
pp. 349-352
◽
Cited By ~ 1
Author(s):
C. Caillat
◽
S. Deleonibus
◽
G. Guegan
◽
M. Heitzmann
◽
M.E. Nier
◽
...
Keyword(s):
Gate Oxide
◽
Gate Length
◽
Hard Mask
◽
Mask Etching
◽
20 Nm
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Robust Cu Dual Damascene Interconnects With Porous SiOCH Films Fabricated by Low-Damage Multi-Hard-Mask Etching Technology
IEEE Transactions on Semiconductor Manufacturing
◽
10.1109/tsm.2006.883593
◽
2006
◽
Vol 19
(4)
◽
pp. 455-464
◽
Cited By ~ 12
Author(s):
H. Ohtake
◽
M. Tagami
◽
M. Tada
◽
M. Ueki
◽
M. Abe
◽
...
Keyword(s):
Hard Mask
◽
Dual Damascene
◽
Mask Etching
◽
Damascene Interconnects
Download Full-text
Precise Control and Resizing of Polysilicon Gate Length by Hard-Mask Etching
Japanese Journal of Applied Physics
◽
10.1143/jjap.37.5519
◽
1998
◽
Vol 37
(Part 1, No. 10)
◽
pp. 5519-5525
◽
Cited By ~ 1
Author(s):
Masaaki Sato
◽
Yoshio Kawai
Keyword(s):
Gate Length
◽
Hard Mask
◽
Precise Control
◽
Polysilicon Gate
◽
Mask Etching
Download Full-text
Integrated process of photoresist trimming and dielectric hard mask etching for sub-50 nm gate patterning
Thin Solid Films
◽
10.1016/j.tsf.2005.09.152
◽
2006
◽
Vol 504
(1-2)
◽
pp. 117-120
◽
Cited By ~ 1
Author(s):
Vladimir Bliznetsov
◽
Rakesh Kumar
◽
Huizhen Lin
◽
Kah-Wee Ang
◽
Won Jong Yoo
◽
...
Keyword(s):
Integrated Process
◽
Hard Mask
◽
Mask Etching
Download Full-text
An ultra-narrow FinFET poly-Si gate structure fabricated with 193nm photolithography and in-situ PR/BARC and TEOS hard mask etching
10.1117/12.769591
◽
2008
◽
Author(s):
Wen-Shiang Liao
◽
Cheng-Han Wu
◽
Mao-Chyuan Tang
◽
Sheng-Yi Huang
◽
Tommy Shih
◽
...
Keyword(s):
Hard Mask
◽
Gate Structure
◽
Mask Etching
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A high aspect ratio Si-fin FinFET fabricated with 193nm scanner photolithography and thermal oxide hard mask etching techniques
10.1117/12.659648
◽
2006
◽
Cited By ~ 1
Author(s):
Wen-Shiang Liao
Keyword(s):
Aspect Ratio
◽
High Aspect Ratio
◽
Hard Mask
◽
Thermal Oxide
◽
Mask Etching
Download Full-text
A thin FinFET Si-fin body structure fabricated with 193nm scanner photolithography and composite hard mask etching technique upon bulk-Si substrate
10.1117/12.714391
◽
2007
◽
Cited By ~ 1
Author(s):
Wen-Shiang Liao
◽
Yu-Huan Liu
◽
Wen-Tung Chang
◽
Tung-Hung Chen
◽
Tommy Shih
◽
...
Keyword(s):
Body Structure
◽
Si Substrate
◽
Etching Technique
◽
Hard Mask
◽
Mask Etching
Download Full-text
Development of equipment-installed APC system and critical dimension control technology of gate-hard-mask etching using its system
ISSM 2005, IEEE International Symposium on Semiconductor Manufacturing, 2005.
◽
10.1109/issm.2005.1513318
◽
2005
◽
Cited By ~ 4
Author(s):
S. Imai
◽
A. Sano
◽
M. Fujimoto
Keyword(s):
Critical Dimension
◽
Control Technology
◽
Hard Mask
◽
Dimension Control
◽
Mask Etching
Download Full-text
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