Carbon Nanotube Electronics: Design of High-Performance and Low-Power Digital Circuits

2007 ◽  
Vol 54 (11) ◽  
pp. 2391-2401 ◽  
Author(s):  
Arijit Raychowdhury ◽  
Kaushik Roy
2021 ◽  
Author(s):  
Марина Евгеньевна Сычева ◽  
Светлана Анатольевна Микаева

В статье рассмотрены основные типы CNTFET транзисторов, изготовленных на углеродных нанотрубках. Представлена классификация, особенности конструкции и основные этапы технологии изготовления CNTFET транзисторов. Полевые транзисторы из углеродных нанотрубок (CNTFET) являются перспективными наноразмерными устройствами для реализации высокопроизводительных схем с очень плотной и низкой мощностью. The article considers the main types of CNTFET transistors made on carbon nanotubes. The classification, design features and the main stages of the CNTFET transistor manufacturing technology are presented. Carbon nanotube field effect transistors (CNTFET) are promising nanoscale devices for implementing high-performance circuits with very dense and low power.


Author(s):  
Марина Евгеньевна Сычева ◽  
Светлана Анатольевна Микаева

В статье рассмотрены нанотранзисторы и основные свойства нанотрубок. Представлен обзор CNTFET транзисторов и основные особенности технологии их изготовления. Полевые транзисторы из углеродных нанотрубок (CNTFET) являются перспективными наноразмерными устройствами для реализации высокопроизводительных схем с очень плотной и низкой мощностью. Проводящий канал CNTFET представляет собой углеродную нанотрубку. The article deals with nanotransistors and the main properties of nanotubes. An overview of CNTFET transistors and the main features of their manufacturing technology is presented. Carbon nanotube field effect transistors (CNTFETs) are promising nanoscale devices for implementing high-performance circuits with very dense and low power. The CNTFET conducting channel is a carbon nanotube.


1989 ◽  
Vol 36 (11) ◽  
pp. 2601-2602 ◽  
Author(s):  
C.W. Farley ◽  
M.F. Chang ◽  
P.M. Asbeck ◽  
K.C. Wang ◽  
N.H. Sheng ◽  
...  

2019 ◽  
Vol 14 (11) ◽  
pp. 1512-1522 ◽  
Author(s):  
Seyedehsomayeh Hatefinasab

Scaling down the size of transistor in the nanoscale reduces the power supply voltage, as a result, the design of high-performance nano-circuit at low voltage has been considered. Most of digital circuits are composed of different components which determine the performance of the entire digital circuits. With the improvement of these components, the digital circuits can be optimized. One of these components is full adder for which various structures have been proposed to improve its performance, among them the two novel full adder structures are based on Gate-Diffusion Input (GDI) structure and half-classical XOR/XNOR logic (SEMI XOR/XNOR) modules. In this paper, Carbon Nanotube Field Effect Transistor (CNTFET)-based low power full adders by using SEMI XOR logic style and GDI structure are presented. Due to the incomparable thermal and mechanical properties of the CNTFET, it can be the first alternative to substitute the metal oxide field effect transistors (MOSFET). The digital circuits have the better performance based on CNTFET. Therefore, the three proposed full adders in this paper are designed based on CNTFET technology with many merits, such as low power dissipation, less energy delay product (EDP), and high speed at various supply voltages, frequencies, temperatures, load capacitors, and the number of tubes. Moreover, these proposed full adders occupy the minimum area consumption and have better performance in comparison with previous standard full adders. All simulations are done by using the Synopsys HSPICE simulator in 32 nm-CNTFET technology and layout of all full adder circuits are presented on Electric.


2008 ◽  
Vol 52 (12) ◽  
pp. 1939-1945 ◽  
Author(s):  
David Bol ◽  
Julien De Vos ◽  
Renaud Ambroise ◽  
Denis Flandre ◽  
Jean-Didier Legat

2014 ◽  
Vol 23 (01) ◽  
pp. 1450005 ◽  
Author(s):  
RAGHVENDRA SINGH ◽  
SHYAM AKASHE

In the design of high performance complex arithmetic logic circuits, ground bounce noise, leakage current and leakage power are important and challenging issues in nanometer down scaling. In this paper, the low power and reduced ground bounce noise using 10 transistor full adder has been proposed. Full adder is the most important basic building of digital circuits employing arithmetic operation. Adder circuit is widely used in many digital circuits not only for arithmetic operation but also for address generation in processors and microcontrollers. It is therefore necessary to make these systems more efficient so that they consume less power. Here, we use stacking power gating technique to evaluate leakage current, power and ground bounce noise. This paper describes reduction of leakage power and ground bounce noise from the 10 T full adder circuits to make it more reliable to be used to have low power and stable and errorless output. All the simulation in this paper has been carried out using cadence virtuoso at 45 nm technology at various voltages and various temperatures. By using this technique the leakage current reduction can be improved by 80% and leakage power to 70% as compared to conventional 10 T full adder. Ground bounce noise can be reduced to 60% as compared to the base full adder.


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