A Low-Reference Spur MDLL-Based Clock Multiplier and Derivation of Discrete-Time Noise Transfer Function for Phase Noise Analysis

2018 ◽  
Vol 65 (2) ◽  
pp. 485-497 ◽  
Author(s):  
Geum-Young Tak ◽  
Kwyro Lee
Energies ◽  
2021 ◽  
Vol 14 (24) ◽  
pp. 8234
Author(s):  
Igor Rutkowski ◽  
Krzysztof Czuba

Quantifying frequency converters’ residual phase noise is essential in various applications, including radar systems, high-speed digital communication, or particle accelerators. Multi-input signal source analyzers can perform such measurements out of the box, but the high cost limits their accessibility. Based on an analysis of phase noise transmission theory and the capabilities of popular instrumentation, we propose a technique extending the functionality of single-input devices. The method supplements absolute noise measurements with estimates of the phase noise transfer function (also called the jitter transfer function), allowing the calculation of residual noise. The details of the hardware setup used for the method verification are presented. The injection of single-tone and pseudo-random modulations to the test signal is examined. Optional employment of a spectrum analyzer can reduce the time and number of data needed for characterization. A wideband synthesizer with an integrated voltage-controlled oscillator was investigated using the method. The estimated transfer function matches a white-box model based on synthesizer’s structure and values of loop components. The first results confirm the validity of the proposed technique.


2007 ◽  
Vol 15 (14) ◽  
pp. 9090 ◽  
Author(s):  
Ryan P. Scott ◽  
Theresa D. Mulder ◽  
Katherine A. Baker ◽  
Brian H. Kolner

2012 ◽  
Vol 22 (4) ◽  
pp. 451-465 ◽  
Author(s):  
Tadeusz Kaczorek

A new modified state variable diagram method is proposed for determination of positive realizations with reduced numbers of delays and without delays of linear discrete-time systems for a given transfer function. Sufficient conditions for the existence of the positive realizations of given proper transfer function are established. It is shown that there exists a positive realization with reduced numbers of delays if there exists a positive realization without delays but with greater dimension. The proposed methods are demonstrated on a numerical example.


Author(s):  
Luca Avallone ◽  
Mario Mercandelli ◽  
Alessio Santiccioli ◽  
Michael Peter Kennedy ◽  
Salvatore Levantino ◽  
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2011 ◽  
Vol 23 (21) ◽  
pp. 1582-1584 ◽  
Author(s):  
Luca Barletta ◽  
Maurizio Magarini ◽  
Arnaldo Spalvieri

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