A 5.3-ps, 8-b Time to Digital Converter Using a New Gain-Reconfigurable Time Amplifier

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2018.2853187 ◽

2019 ◽

Vol 66 (3) ◽

pp. 352-356 ◽

Author(s):

Hasan Molaei ◽

Khosrow Hajsadeghi

Keyword(s):

Digital Converter ◽

Time To Digital Converter ◽

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A 7b, 3.75ps resolution two-step time-to-digital converter in 65nm CMOS using pulse-train time amplifier

2012 Symposium on VLSI Circuits (VLSIC) ◽

10.1109/vlsic.2012.6243855 ◽

2012 ◽

Author(s):

KwangSeok Kim ◽

YoungHwa Kim ◽

WonSik Yu ◽

SeongHwan Cho

Keyword(s):

Pulse Train ◽

Digital Converter ◽

Time To Digital Converter ◽

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A 9 Bit, 3.6 ps Resolution Pipeline Time-to-Digital Converter

Journal of Circuits System and Computers ◽

10.1142/s0218126620501248 ◽

2019 ◽

Vol 29 (08) ◽

pp. 2050124

Author(s):

Farshad Goodarzi ◽

Siroos Toofan

Keyword(s):

Fine Structure ◽

Supply Voltage ◽

Cmos Technology ◽

Digital Converter ◽

Time Intervals ◽

Wide Linear Range ◽

Time To Digital Converter ◽

Good Linearity ◽

This paper describes a 9-bit time-to-digital converter (TDC) with 3.6 ps resolution. The resolution of 3.6 ps is achieved using coarse and fine structure. The structure of the proposed two-step pipeline TDC is composed of a 4-bit coarse TDC (CTDC) based on delay line and a 5-bit fine TDC (FTDC) based on an SAR-CD algorithm where a Time Amplifier (TA) is used between them. Since TA amplifies the time intervals in different stages of delay line to achieve accurate gain with wide linear range. Therefore, the TDC has good linearity. The proposed TDC has Differential Non-Linearity (DNL) and Integral Non-Linearity (INL) errors of 1.6 and 2.6 LSB, respectively. This TDC was designed in 0.18[Formula: see text][Formula: see text]m CMOS technology. Using a supply voltage of 1.8[Formula: see text]V, the proposed TDC consumes 1.88[Formula: see text]mW at 25 MS/s throughput.

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A 0.5ps 1.4mW 50MS/s Nyquist bandwidth time amplifier based two-step flash-ΔΣ time-to-digital converter

2016 Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP) ◽

10.1109/ebccsp.2016.7605282 ◽

2016 ◽

Author(s):

Ying Wu ◽

Robert Bogdan Staszewski

Keyword(s):

Digital Converter ◽

Time To Digital Converter ◽

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A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop

13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems ◽

10.1109/ddecs.2010.5491766 ◽

2010 ◽

Author(s):

Kuo-Hsing Cheng ◽

Chang-Chien Hu ◽

Jen-Chieh Liu ◽

Hong-Yi Huang

Keyword(s):

Phase Locked Loop ◽

Digital Converter ◽

Time To Digital Converter ◽

Digital Phase ◽

Phase Sampling ◽

Time Amplifier ◽

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A high resolution time amplifier based time-to-digital converter for 3D image sensor

2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) ◽

10.1109/edaps.2017.8277034 ◽

2017 ◽

Author(s):

Xiangliang Jin ◽

Can Cao

Keyword(s):

High Resolution ◽

Image Sensor ◽

3D Image ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter ◽

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A 7 bit, 3.75 ps Resolution Two-Step Time-to-Digital Converter in 65 nm CMOS Using Pulse-Train Time Amplifier

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2013.2237996 ◽

2013 ◽

Vol 48 (4) ◽

pp. 1009-1017 ◽

Author(s):

KwangSeok Kim ◽

Young-Hwa Kim ◽

Wonsik Yu ◽

SeongHwan Cho

Keyword(s):

Pulse Train ◽

Digital Converter ◽

Time To Digital Converter ◽

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A 2ps minimum-resolution, wide-input-range time-to-digital converter for the time-of-flight measurement using cyclic technique and time amplifier

2016 IEEE International Conference on Consumer Electronics (ICCE) ◽

10.1109/icce.2016.7430559 ◽

2016 ◽

Author(s):

Ji-Hak Yu ◽

Min-Ki Park ◽

Soo-Won Kim

Keyword(s):

Time Of Flight ◽

Digital Converter ◽

Time To Digital Converter ◽

Flight Measurement ◽

Input Range ◽

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A 0.357ps Resolution, 2.4GHz Time-to-Digital Converter with Phase-Interpolator and Time Amplifier

IEICE Transactions on Electronics ◽

10.1587/transele.e94.c.1896 ◽

2011 ◽

Vol E94-C (12) ◽

pp. 1896-1901

Author(s):

YoungHwa KIM ◽

AnSoo PARK ◽

Joon-Sung PARK ◽

YoungGun PU ◽

Hyung-Gu PARK ◽

...

Keyword(s):

Digital Converter ◽

Time To Digital Converter ◽

Phase Interpolator ◽

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A fast-locking all-digital phased-locked loop with a 1 ps resolution time-to-digital converter using calibrated time amplifier and interpolation digitally-controlled-oscillator

2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) ◽

10.1109/edssc.2016.7785286 ◽

2016 ◽

Author(s):

Hsing-Chien Chu ◽

Yi-Hsiang Hua ◽

Chung-Chih Hung

Keyword(s):

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter ◽

Digitally Controlled ◽

Digitally Controlled Oscillator ◽

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In-pixel time-to-digital converter for 3D TOF cameras with time amplifier

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-015-0570-7 ◽

2015 ◽

Vol 85 (2) ◽

pp. 275-281 ◽

Author(s):

Lizhen Tang ◽

Xiangliang Jin ◽

Hongjiao Yang ◽

Jia Yang ◽

Weihui Liu

Keyword(s):

Digital Converter ◽

Time To Digital Converter ◽

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