On-Chip Total Ionizing Dose Digital Monitor in Fully Depleted SOI Technologies

Abstract. An attractive solution to provide several channels with very high data rates of tens of Gbit s−1 for digital-to-analog converters (DACs) in arbitrary waveform generators (AWGs) is to use a high speed serializer in front of the DAC. As data sources, on-chip memories, digital signal processors or field-programmable gate arrays can be used. Here, we present a serializer consisting of a 19 channel 16:1 multiplexer (MUX) for output data rates up to 64 Gbit s−1 per channel and a low skew (∼ 8.8 ps) two-phase frequency divider and clock distribution network that is completely realized in static CMOS logic. The circuit is designed in a 28 nm Fully-Depleted Silicon-on-Insulator (FD-SOI) technology and will be used in an 8 bit 64 GS s−1 DAC between the on-chip memory and the DAC output stage. Due to a four bits unary and four bits binary segmentation, a 19 channel MUX is required. Simulations on layout level reveal a data-dependent peak-to-peak jitter of less than 1.8 ps at the output of one MUX channel with a total average power consumption of approximately 1.15 W of the whole MUX and clock network.

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Total-ionizing-dose radiation response of 32 nm partially and 45 nm fully-depleted SOI devices

2012 IEEE International SOI Conference (SOI) ◽

10.1109/soi.2012.6404374 ◽

2012 ◽

Cited By ~ 6

Author(s):

N. Rezzak ◽

E. X. Zhang ◽

D. R. Ball ◽

M. L. Alles ◽

T. D. Loveless ◽

...

Keyword(s):

Radiation Response ◽

Total Ionizing Dose ◽

Fully Depleted ◽

Soi Devices ◽

Dose Radiation

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Total ionizing dose effects on the digital performance of irradiated OCTO and conventional fully depleted SOI MOSFET

2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS) ◽

10.1109/radecs.2013.6937375 ◽

2013 ◽

Cited By ~ 3

Author(s):

Leonardo Navarenho de Souza Fino ◽

Marcilei Aparecida Guazzelli da Silveira ◽

Christian Renaux ◽

Denis Flandre ◽

Salvador Pinillos Gimenez

Keyword(s):

Total Ionizing Dose ◽

Fully Depleted ◽

Soi Mosfet ◽

Digital Performance ◽

Dose Effects ◽

Total Ionizing Dose Effects

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Fully Depleted Silicon on Insulator Devices CMOS: The 28-nm Node Is the Perfect Technology for Analog, RF, mmW, and Mixed-Signal System-on-Chip Integration

IEEE Solid-State Circuits Magazine ◽

10.1109/mssc.2017.2745738 ◽

2017 ◽

Vol 9 (4) ◽

pp. 18-26 ◽

Cited By ~ 24

Author(s):

Andreia Cathelin

Keyword(s):

System On Chip ◽

Silicon On Insulator ◽

Signal System ◽

Mixed Signal ◽

Fully Depleted ◽

On Chip ◽

28 Nm

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Primary Total Ionizing Dose Effect Studies on Xilinx SoC Irradiated with 60Co γ Rays

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.678.252 ◽

2014 ◽

Vol 678 ◽

pp. 252-259

Author(s):

Yao Zhang ◽

Xin Du ◽

Xue Cheng Du ◽

Dong Sheng He ◽

Lin Gang Zhang ◽

...

Keyword(s):

Room Temperature ◽

Radiation Effect ◽

Experimental System ◽

Dose Effect ◽

Test Results ◽

Total Ionizing Dose ◽

Test Board ◽

Γ Rays ◽

Current Value ◽

On Chip

We designed radiation effect experimental system including current measurement section and functional test section for Xilinx Zynq-7010 System on chip (SoC) and performed the Total Ionizing Dose (TID) experiment irradiated by Co60 γ-source on the chip. At the dose rate of 0.04 Gy(Si)/s, the total dose of 1.69 kGy(Si), the current value in the experiment increased first and then decreased. The test board got functional interruption at the gamma dose of 1.69 kGy(Si). The function of the board normalized after room temperature annealing and 70°C high temperature annealing except that the current value decreased by 28% compared to the current before irradiation. The mechanisms for the first TID test results on Xilinx SoC were deduced and discussed.

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Radiation Hardened Cortex®-R4F System-on-Chip Prototype with Total Ionizing Dose Dynamic Compensation in 28nm FD-SOI

IEEE Transactions on Nuclear Science ◽

10.1109/tns.2021.3071199 ◽

2021 ◽

pp. 1-1

Author(s):

Fady Abouzeid ◽

Capucine Lecat-Mathieu De Boissac ◽

Victor Malherbe ◽

Jean-Marc Daveau ◽

Anna Asquini ◽

...

Keyword(s):

System On Chip ◽

Total Ionizing Dose ◽

Dynamic Compensation ◽

Radiation Hardened ◽

On Chip

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Highresolution X-Ray Spectroscopy at Room Temperature

Microscopy and Microanalysis ◽

10.1017/s1431927600021000 ◽

1998 ◽

Vol 4 (S2) ◽

pp. 176-177

Author(s):

L. Strüder ◽

P. Lechner ◽

P. Leutenegger ◽

T. Schülein

Keyword(s):

Room Temperature ◽

Acoustic Noise ◽

Entrance Window ◽

X Rays ◽

Fully Depleted ◽

X Ray ◽

Integrated Electronics ◽

Liquid Nitrogen Cooling ◽

On Chip ◽

Excellent Energy Resolution

Silicon drift detectors (SDD) have shown an excellent energy resolution close to room temperature. All signal charges, generated in the fully depleted volume by ionizing radiation are guided to a small electron collecting read-out node. The first amplification is realized with an integrated on-chip JFET. The total read-out capacitance can be kept below 250 fF, independent of the detector area. The fact, that the first amplifier is already integrated in the detector offers many operational advantages: (a) better resolution because of the reduction of read-node capacitance, (b) insensitivity with respect to acoustic noise and electrical pick-up, (c) compact detector packaging and (d) the absence of liquid nitrogen cooling. Fig. 1 shows the detector concept, including the integrated electronics. The X-rays are hitting the SDD from the homogeneous radiation entrance window on the backside of the device.

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