An NMOS Low Drop-out Voltage Regulator with -17dB Wide-Band Power Supply Rejection for SerDes in 22FDX

Author(s):  
Nitin Bansal ◽  
Rahul Gupta
2012 ◽  
Vol 12 (3) ◽  
pp. 313-319 ◽  
Author(s):  
Ho-Joon Jang ◽  
Yong-Seong Roh ◽  
Young-Jin Moon ◽  
Jeong-Pyo Park ◽  
Chang-Sik Yoo

2019 ◽  
Vol 14 (1) ◽  
Author(s):  
Yue Shi ◽  
Anqi Wang ◽  
Jianwen Cao ◽  
Zekun Zhou

AbstractA high-stability voltage regulator (VR) is proposed in this paper, which integrates transient enhancement and overcurrent protection (OCP). Taken into consideration the performance and area advantages of low-voltage devices, most control parts of proposed VR are supplied by the regulated output voltage, which forms self-power technique (SPT) with power supply rejection (PSR) boosting. Besides, the stability and transient response are enhanced by dynamic load technique (DLT). An embedded overcurrent feedback loop is also adopted to protect the presented VR from damage under overload situations. The proposed VR is implemented in a standard 350 nm BCD technology, whose results indicate the VR can steadily work with 5.5–30 V input voltage, 0–30 mA load range, and 0.1–3.3 μF output capacitor. A 2.98 μV/V line regulation and a 0.233 mV/mA load regulation are achieved with a 40 mA current limiting. The PSR is better than − 64 dB up to 10 MHz with a 0.1 μF output capacitor.


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