High performance 60 nm CMOS technology enhanced with BST (body-slightly-tied) structure SOI and Cu/low-k (k=2.9) interconnect for microprocessors

Author(s):  
I. Kudo ◽  
S. Miyake ◽  
T. Syo ◽  
S. Maruyama ◽  
Y. Yama ◽  
...  
2002 ◽  
Vol 42 (1) ◽  
pp. 15-25 ◽  
Author(s):  
Yoshihiro Takao ◽  
Hiroshi Kudo ◽  
Junichi Mitani ◽  
Yoshiyuki Kotani ◽  
Satoshi Yamaguchi ◽  
...  

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