Effects of A Rotated Chip Package on Mechanical and Thermal Performances

Author(s):  
Henry H. Jung ◽  
Ron Zhang ◽  
Eddie Lee ◽  
Sai Ankireddi

In the industry, heatsinks have commonly been oriented on IC packages so that their plan outlines are edge-wise parallel to those of the package. However there are situations where a rotated orientation is preferable, wherein the plan outline of the package is not ‘aligned’ with that of the heatsink assembly — in other words a situation where the heatsink location/orientation remain unchanged while the package itself is rotated in-plane. Mechanical design considerations may drive the need for such a non-traditional orientation, since the rotated package is anticipated to have lower mechanical stress levels in the silicon than the non-rotated one under the same heatsink-induced clamping load. In this study we examine the impact of such package rotation(s) on both the junction temperature performance of CPU packages and the package-level clamp-load induced mechanical stresses. Results show that the stress reduction in the rotated package is in the range of 15% to 60%. The thermal analysis also demonstrates that the effects on the hot spot temperature with 45 degrees rotation is an increase of almost 2°C compared with the non-rotated die case. This increase in junction temperature is expected to be even higher with lower airflow as seen in typical computer systems. Thus it may be inferred that it is important to consider the effects of die rotation on package performances.

Author(s):  
Risako Kibushi ◽  
Tomoyuki Hatakeyama ◽  
Masaru Ishizuka

This paper describes thermal properties of power Si MOSFET. The problem of hot spot in sub-micron scale Si MOSFET has been widely known. Recently, power Si MOSFET is a key device in a lot of area, for example car electronics. In power Si MOSFET, high voltage is applied and high current is generated. Therefore, heat generation becomes higher and thermal management is important. In this paper, thermal properties of power Si MOSFET is evaluated with Electro-Thermal Analysis and impurity dependency of temperature of power Si MOSFET is discussed. Under high electric field, electron thermal energy becomes much higher than thermal energy of crystal lattice. Therefore, in this paper, non-equilibrium energy state between electron and lattice is considered. Calculated results showed that hot spot appears in power Si MOSFET. Further, it is investigated that the impact of donor density on hot spot temperature is strong.


Author(s):  
Zhengang Zhao ◽  
Zhangnan Jiang ◽  
Yang Li ◽  
Chuan Li ◽  
Dacheng Zhang

The temperature of the hot-spots on windings is a crucial factor that can limit the overload capacity of the transformer. Few studies consider the impact of the load on the hot-spot when studying the hot-spot temperature and its location. In this paper, a thermal circuit model based on the thermoelectric analogy method is built to simulate the transformer winding and transformer oil temperature distribution. The hot-spot temperature and its location under different loads are qualitatively analyzed, and the hot-spot location is analyzed and compared to the experimental results. The results show that the hot-spot position on the winding under the rated power appears at 85.88% of the winding height, and the hot-spot position of the winding moves down by 5% in turn at 1.3, 1.48, and 1.73 times the rated power respectively.


2018 ◽  
Author(s):  
Risako Kibushi ◽  
Tomoyuki Hatakeyama ◽  
Kazuhisa Yuki ◽  
Noriyuki Unno ◽  
Masaru Ishizuka

2020 ◽  
Vol 17 (7) ◽  
pp. 2905-2911
Author(s):  
Ngoc Thi Nguyen ◽  
Seong-Ji Min ◽  
Sang-Mo Koo

This paper presents a comparison of device behaviors of 4H-SiC DMOSFET (DMOS), trench MOS-FETs without (T-MOS) and with a p-shield (TP-MOS). The influence of doping density on device temperature distribution is investigated using the electro-thermal analysis method. It is established that the formation of a hot-spot (the highest temperature) is formed at the junction between the p-base and the n-drift region next to the corner of the trench gate. This hot spot temperature increases with rising doping density of the n-drift region. Additionally on-resistance (Ron) of the three examined structures increase when temperatures rise from 300 K to 523 K. At 300 K, the on-resistance of the TP-MOS was 2.7 mil cm2 32.5% lower than that of T-MOS while 67.47% lower than that of DMOS. When the temperature rises to 523 K, TP-MOS structure, with an on-resistance of 5.26 mil cm2 is obtained, which is lower by 34.25% and 73.7% with comparison to those of T-MOS and DMOS, respectively.


SIMULATION ◽  
2022 ◽  
pp. 003754972110699
Author(s):  
José V C Vargas ◽  
Sam Yang ◽  
Juan Carlos Ordonez ◽  
Luiz F Rigatti ◽  
Pedro H R Peixoto ◽  
...  

A simplified three-dimensional mathematical model for electronic packaging cabinets was derived from physical laws. Tridimensionality resulted from the domain division in volume elements (VEs) with uniform properties, each with one temperature, and empirical and theoretical correlations allowed for modeling their energetic interaction, thus producing ordinary differential equations (ODEs) temperatures versus time system. The cabinet (2048 mm × 1974 mm × 850 mm) thermal response with one heat source was measured. Data set 1 with a 1.6-kW power source was used for model adjustment by solving an inverse problem of parameter estimation (IPPE) having the cabinet internal average air velocities as adjustment parameters. Data set 2 obtained with a 3-kW power source validated model results. The converged mesh had a total of 7500 VE. The steady-state solution took between 16 and 19 s of CPU time to reach convergence and less than 3 min to obtain the 6500-s cabinet dynamic response under variable loading conditions, in an Intel CORE i7 computer. After validation, the model was used to study the impact of heat source height on system thermal response. Fundamentally, a sharp minimum junction temperature Tjct,min = 98.5 °C was obtained in the system hot spot at an optimal heat source height, which was 25.7 °C less than the highest calculated value within the investigated range (0.1 m < zjct < 1.66 m) for the 1.6-kW power setting, which characterizes the novelty of the research, and is worth to be pursued, no matter how complex the actual cabinet design may be.


2009 ◽  
Vol 46 (3) ◽  
pp. 137-152 ◽  
Author(s):  
Mile Djurdjevic ◽  
Glenn Byczynski ◽  
Carola Schechowiak ◽  
Hagen Stieler ◽  
Jelena Pavlovic

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